[SRU][K][PATCH 2/5] riscv: dts: microchip: reduce the fic3 clock rate

[Emil Renner Berthing]

From: Conor Dooley <conor.dooley at microchip.com>

BugLink: https://bugs.launchpad.net/bugs/1993148

For the v2022.09 release of the reference design, the fic3 clock rate
been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed
significantly more quickly by customers who chose to build the
reference design themselves.

Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
(cherry picked from commit fa52935abef422d119dda3c10c02787a86e6289d)
Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
---
 arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
index 33a373692e2e..2888bfd05fbe 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
@@ -28,7 +28,7 @@ i2c2: i2c at 40000200 {
 	fabric_clk3: fabric-clk3 {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
-		clock-frequency = <62500000>;
+		clock-frequency = <50000000>;
 	};
 
 	fabric_clk1: fabric-clk1 {
-- 
2.37.2