[SRU][K][PATCH 1/5] riscv: dts: microchip: icicle: re-jig fabric peripheral addresses

[Emil Renner Berthing]

From: Conor Dooley <conor.dooley at microchip.com>

BugLink: https://bugs.launchpad.net/bugs/1993148

When users try to add onto the reference design, they find that the
current addresses that peripherals connected to Fabric InterConnect
(FIC) 3 use are restrictive. For the v2022.09 reference design, the
peripherals have been shifted down, leaving more contiguous address
space for their custom IP/peripherals.

Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
(cherry picked from commit ab291621a8b85269496ae9a964b6d49cd1e030c8)
Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
---
 arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
index 0d28858b83f2..33a373692e2e 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
@@ -4,18 +4,18 @@
 / {
 	compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs";
 
-	core_pwm0: pwm at 41000000 {
+	core_pwm0: pwm at 40000000 {
 		compatible = "microchip,corepwm-rtl-v4";
-		reg = <0x0 0x41000000 0x0 0xF0>;
+		reg = <0x0 0x40000000 0x0 0xF0>;
 		microchip,sync-update-mask = /bits/ 32 <0>;
 		#pwm-cells = <2>;
 		clocks = <&fabric_clk3>;
 		status = "disabled";
 	};
 
-	i2c2: i2c at 44000000 {
+	i2c2: i2c at 40000200 {
 		compatible = "microchip,corei2c-rtl-v7";
-		reg = <0x0 0x44000000 0x0 0x1000>;
+		reg = <0x0 0x40000200 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clocks = <&fabric_clk3>;
-- 
2.37.2