Assembly language programming in unix environment

Odd iodine at
Mon Sep 21 14:23:12 UTC 2009

freeburn wrote:
>> You are so wrong. There is no difference between AMD and Intel
>> processors, except for performance. They are both RISC under the
>> hood. The instruction set is CISC, but at the chip level they both
>> break down the CISC into RISC ops.
> you have missed one critical point here, i admitted that i don't know
> much about RISC, 

And you don't know anything about AMD chips.
We get it. But stop acting like you do.

>>  and we were taught all about CISC
>>> processor. so i know how to program intel processors. and as far as i
>>> know programming RISC machine is way more difficult than CISC one.
> look at the language i used "as far as i know". so why do u think i'm
> saying it confidently?

I don't know. You are wrong on so many levels that it's a wonder
you can say anything with confidence. So please stop. You may
confuse people with your ignorant talk.

>> Nope. It's easier. The Intel instruction set is very convoluted, while
>> most RISC chips have a well thought out, easy to learn instruction set.
> i find intel instruction set very effective, and i'm fan of their
> addressing modes. 

Then you are a fan of AMD's too.

>> You sound like the AVR is the only RISC on the market. The most
>> used embedded CPU is the ARM. The instructon set for that is
>> very good. Then you have MIPS, SuperH, PowerPC and a lot of
>> others. Don't think your exposure to the AVR has any bearing on
>> the rest of the RISCs.
> i've repeatedly said that i don't know much about risc. and u are
> arguing about the points where u think i am wrong about risc. does this
> ring a bell? 

If you don't know much about RISC, you shouldn't act like you do.

I'm arguing that you are wrong about RISC, you are wrong about AMD
being RISC, and you are wrong about CISC being more effective than
RISC. The fact that both Intel and AMD break CISC instructions into
RISC tells you that.


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