Assembly language programming in unix environment

[freeburn]

> 
> You are so wrong. There is no difference between AMD and Intel
> processors, except for performance. They are both RISC under the
> hood. The instruction set is CISC, but at the chip level they both
> break down the CISC into RISC ops.
> 
> >

you have missed one critical point here, i admitted that i don't know
much about RISC, 

>  and we were taught all about CISC
> > processor. so i know how to program intel processors. and as far as i
> > know programming RISC machine is way more difficult than CISC one.
> 

look at the language i used "as far as i know". so why do u think i'm
saying it confidently?

> Nope. It's easier. The Intel instruction set is very convoluted, while
> most RISC chips have a well thought out, easy to learn instruction set.

i find intel instruction set very effective, and i'm fan of their
addressing modes. 



> Geeze, where so you get this from? It's the exact opposite. Intel/AMD's
> CISC stuff is the ones that are broken down into RISC ops. The only
> RISC processor that does anything similar, AFAIK, is IBM's Power.
> And that is only for a few instructions. Intel and AMD does it on a
> almost total scale.
> 
Oh, and the istruction set is only as "intelligent" as the programmermakes it.
> 
> > 

i think u have misunderstood ,or may be its my fault to have a poor
language skill(english is not "my" language:D)i was mentioning that risc
instructions are simpler and more  elementary than CISC instruction .so
it will take more instructions for similar job. many cisc instructions
can be 20/30 machine cycle long. (again i'm referring to avr, sorry
about that)where most instruction in avr is one cycle long. some of them
2 cycles.  



> 
> You sound like the AVR is the only RISC on the market. The most
> used embedded CPU is the ARM. The instructon set for that is
> very good. Then you have MIPS, SuperH, PowerPC and a lot of
> others. Don't think your exposure to the AVR has any bearing on
> the rest of the RISCs.
> 

i've repeatedly said that i don't know much about risc. and u are
arguing about the points where u think i am wrong about risc. does this
ring a bell? 


> -- 
> Odd
>