[SRU] [jammy xilinx-zynqmp 3/3] arm64: zynqmp: Fix kr260 clock wiring

[Portia Stephens]

From: Michal Simek <michal.simek at amd.com>

BugLink: https://bugs.launchpad.net/bugs/2055241

kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.

On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.

(cherry picked from commit a0fe3083d290f8507922a68daa60cb92d76d56b2 linux-xlnx/xlnx_rebase_v6.6_LTS)

Link: https://lore.kernel.org/r/e87ae94979c6efc909740bb1a569505042e4f876.1706626255.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek at amd.com>
State: pending
Signed-off-by: Portia Stephens <portia.stephens at canonical.com>
---
 .../arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts | 14 ++++++++++----
 .../arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts |  6 ++++++
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts
index 3e49dcbfe672..474ce65e5eef 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts
@@ -25,16 +25,22 @@ ina260-u14 {
 		io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
 	};
 
+	clk_27: clock0 { /* u86 - DP */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <27000000>;
+	};
+
 	clk_125: si5332_0 { /* u17 - GEM0/1 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <125000000>;
 	};
 
-	clk_27: si5332_1 { /* u17 - DP */
+	clk_74: si5332_5 { /* u17 - SLVC-EC */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
-		clock-frequency = <27000000>;
+		clock-frequency = <74250000>;
 	};
 
 	clk_26: si5332_2 { /* u17 - USB */
@@ -49,13 +55,13 @@ clk_156: si5332_3 { /* u17 - SFP+ */
 		clock-frequency = <156250000>;
 	};
 
-	clk_25_0: si5332_4 { /* u17 - GEM2 */
+	clk_25_0: si5332_1 { /* u17 - GEM2 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <25000000>;
 	};
 
-	clk_25_1: si5332_5 { /* u17 - GEM3 */
+	clk_25_1: si5332_4 { /* u17 - GEM3 */
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <25000000>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts
index 4a0cabda3102..6636a63298ea 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts
@@ -60,6 +60,12 @@ clk_25_1: clock5 { /* u92/u91 - GEM3 */
 		#clock-cells = <0>;
 		clock-frequency = <25000000>;
 	};
+
+	clk_74: clock6 { /* u88 - SLVC-EC */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <74250000>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
-- 
2.34.1