[SRU] [jammy xilinx-zynqmp 2/3] arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs

[Portia Stephens]

From: Michal Simek <michal.simek at amd.com>

BugLink: https://bugs.launchpad.net/bugs/2055241

Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).

(cherry picked from commit d9d492b32494611dbcc422d9f365a59df20c69b1 linux-xlnx/xlnx_rebase_v6.6_LTS)

Link: https://lore.kernel.org/r/c430aeacaa76d9f61ed3f874f721a33049f45eb9.1706514396.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek at amd.com>
State: pending
Signed-off-by: Portia Stephens <portia.stephens at canonical.com>
---
 arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts
index 56f31285285f..94cb63cc6a18 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts
@@ -32,6 +32,18 @@ clk_26: clock2 { /* u17 - USB */
 		#clock-cells = <0>;
 		clock-frequency = <26000000>;
 	};
+
+	clk_25_0: clock4 { /* u92/u91 - GEM2 */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+	};
+
+	clk_25_1: clock5 { /* u92/u91 - GEM3 */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+	};
 };
 
 &can0 {
-- 
2.34.1