[SRU][linux-aws-bionic][PULL] ARM CPU support update
Kamal Mostafa
kamal at canonical.com
Thu Oct 31 18:51:23 UTC 2019
The following changes since commit 645cfea54bfa87dcaa766215ccd4fc31d8bf65f1:
UBUNTU: Ubuntu-aws-4.15.0-1053.55 (2019-10-22 02:50:20 -0400)
are available in the Git repository at:
git://git.launchpad.net/~kamalmostafa/ubuntu/+source/linux-aws/+git/bionic arm-update
for you to fetch changes up to 453b3104bc838a71f05e2702e2d62f8bc1d9b41f:
arm64: Avoid flush_icache_range() in alternatives patching code (2019-10-30 10:43:22 -0700)
----------------------------------------------------------------
Ard Biesheuvel (6):
efi: honour memory reservations passed via a linux specific config table
efi: add API to reserve memory persistently across kexec reboot
efi/arm: libstub: add a root memreserve config table
efi: Permit calling efi_mem_reserve_persistent() from atomic context
efi: Prevent GICv3 WARN() by mapping the memreserve table before first use
efi: Permit multiple entries in persistent memreserve data structure
Dave Martin (1):
arm64: capabilities: Update prototype for enable call back
Jia He (1):
irqchip/gic-v3-its: Cap lpi_id_bits to reduce memory footprint
Julien Grall (1):
arm64/cpufeature: Convert hook_lock to raw_spin_lock_t in cpu_enable_ssbs()
Marc Zyngier (19):
irqchip/gic-v3-its: Refactor LPI allocator
irqchip/gic-v3-its: Use full range of LPIs
irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
irqchip/gic-v3-its: Drop chunk allocation compatibility
irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
irqchip/gic-v3-its: Honor hypervisor enforced LPI range
irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices
irqchip/gic-v3: Allow LPIs to be disabled from the command line
irqchip/gic-v3-its: Change initialization ordering for LPIs
irqchip/gic-v3-its: Simplify LPI_PENDBASE_SZ usage
irqchip/gic-v3-its: Split property table clearing from allocation
irqchip/gic-v3-its: Move pending table allocation to init time
irqchip/gic-v3-its: Keep track of property table's PA and VA
irqchip/gic-v3-its: Allow use of pre-programmed LPI tables
irqchip/gic-v3-its: Use pre-programmed redistributor tables with kdump kernels
irqchip/gic-v3-its: Check that all RDs have the same property table
irqchip/gic-v3-its: Register LPI tables with EFI config table
irqchip/gic-v3-its: Allow use of LPI tables in reserved memory
arm64: Force SSBS on context switch
Mark Rutland (6):
arm64: move SCTLR_EL{1,2} assertions to <asm/sysreg.h>
arm64: Introduce sysreg_clear_set()
arm64: kill config_sctlr_el1()
arm64: add PSR_AA32_* definitions
arm64: don't zero DIT on signal return
arm64: fix SSBS sanitization
Shanker Donthineni (1):
irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling
Suzuki K Poulose (5):
arm64: capabilities: Move errata work around check on boot CPU
arm64: capabilities: Move errata processing code
arm64: capabilities: Prepare for fine grained capabilities
arm64: capabilities: Add flags to handle the conflicts on late CPU
arm64: capabilities: Introduce weak features based on local CPU
Will Deacon (6):
arm64: Fix silly typo in comment
arm64: cpufeature: Detect SSBS and advertise to userspace
arm64: ssbd: Add support for PSTATE.SSBS rather than trapping to EL3
KVM: arm64: Set SCTLR_EL2.DSSBS if SSBD is forcefully disabled and !vhe
arm64: cpu: Move errata and feature enable callbacks closer to callers
arm64: Avoid flush_icache_range() in alternatives patching code
Documentation/admin-guide/kernel-parameters.txt | 8 +
arch/arm64/include/asm/alternative.h | 7 +-
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/cpufeature.h | 195 ++++++++-
arch/arm64/include/asm/fpsimd.h | 4 +-
arch/arm64/include/asm/kvm_host.h | 11 +
arch/arm64/include/asm/processor.h | 22 +-
arch/arm64/include/asm/ptrace.h | 58 ++-
arch/arm64/include/asm/sysreg.h | 54 ++-
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/include/uapi/asm/ptrace.h | 1 +
arch/arm64/kernel/alternative.c | 51 ++-
arch/arm64/kernel/armv8_deprecated.c | 8 +-
arch/arm64/kernel/cpu_errata.c | 131 +++---
arch/arm64/kernel/cpufeature.c | 215 ++++++++--
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/kernel/fpsimd.c | 5 +-
arch/arm64/kernel/module.c | 5 +-
arch/arm64/kernel/process.c | 31 ++
arch/arm64/kernel/ptrace.c | 13 +-
arch/arm64/kernel/smp.c | 6 -
arch/arm64/kernel/ssbd.c | 21 +
arch/arm64/kernel/traps.c | 7 +-
arch/arm64/kvm/hyp/sysreg-sr.c | 11 +
arch/arm64/mm/fault.c | 15 -
drivers/firmware/efi/efi.c | 95 +++++
drivers/firmware/efi/libstub/arm-stub.c | 27 ++
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 16 +-
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 2 +
drivers/irqchip/irq-gic-v3-its.c | 523 ++++++++++++++++++------
drivers/irqchip/irq-gic-v3.c | 35 +-
include/linux/efi.h | 16 +
include/linux/irqchip/arm-gic-v3.h | 8 +-
33 files changed, 1254 insertions(+), 352 deletions(-)
More information about the kernel-team
mailing list