Optimized kernel builds: the straight dope

[John Richard Moser]

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Rocco Stanzione wrote:
> On Monday 14 August 2006 7:33 pm, Matt Zimmerman wrote:
> <snip>
>> I'm interested to hear (objective, reasoned) feedback on this data and my
>> conclusions from the members of this list.
> 
> The numbers are enough to convince me that we don't need to keep building 
> these cpu-optimized kernels.  It would be nice, though, to see smp kernels 
> that don't support 4GB of ram (and that don't incur the penalty for 

Supporting 4GB RAM and 64GB RAM involves entering PAE mode.  I'm pretty
sure PAE mode is entered anyway to get an NX bit on newer x86 CPUs that
have it.  Honestly though I don't know what the freg paging address
extensions does beyond that :)

I'm not sure if the overhead is actually significant.  18% of the
system's CPU time is spent in the kernel in normal use; and a fraction
of a percent of that is spent mucking about where this matters.  Unlike
having a 4GiB VMA, high memory support doesn't make context switches
take 5 times longer, so you won't get visible performance loss from
syscalls and task switches suddenly being slower.

> supporting it) and those that do support large amounts of ram without being 
> smp kernels.  Instead of saving kernel build times etc., more users would see 

An SMP kernel does (approximately) this:

spin_lock(x) :
  lock  ; only we access whatever the next insn touches
  inc_if_zero x.count
  jz spin_lock ;loop if that failed

spin_unlock(x) :
  lock
  dec x.count


A UP kernel does this:

spin_lock(x) :
  inc_if_zero x.count
  jz spin_lock ;loop if that failed

spin_unlock(x) :
  dec x.count


Now, these days, when an SMP kernel comes up and sees one CPU, it
patches its own code so that it does this:

spin_lock(x) :
  nop   ; do nothing, 0 cycle instruction
  inc_if_zero x.count
  jz spin_lock ;loop

spin_unlock(x) :
  nop
  dec x.count


So all our kernels can be SMP with no detriment.

> a real performance impact for the same number (?) of kernel images.
> 
> Rocco
> 

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