<div dir="ltr">Thank you for the input, I will check with Lenovo. </div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Sep 24, 2024 at 2:04 AM Timo Aaltonen <<a href="mailto:tjaalton@ubuntu.com">tjaalton@ubuntu.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Michael Reed kirjoitti 23.9.2024 klo 23.37:<br>
> From: Michael Reed <<a href="mailto:Michael.Reed@canonical.com" target="_blank">Michael.Reed@canonical.com</a>><br>
> <br>
> BugLink: <a href="https://bugs.launchpad.net/bugs/2077140" rel="noreferrer" target="_blank">https://bugs.launchpad.net/bugs/2077140</a><br>
> <br>
> SRU Justification:<br>
> <br>
> [Impact]<br>
> Add Arrow Lake H support<br>
> <br>
> According to <a href="https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c" rel="noreferrer" target="_blank">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c</a> and<br>
> <a href="https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx" rel="noreferrer" target="_blank">https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx</a>, Intel Arrow Lake Graphics feature(Xe driver) is ready for Linux kernel 6.9.<br>
> <br>
> [Fix]<br>
> <br>
> """""<br>
> commit 6a9b38cc68a03b948df1f3fcb907c7557cfc315c<br>
> Author: Matt Roper <<a href="mailto:matthew.d.roper@intel.com" target="_blank">matthew.d.roper@intel.com</a>><br>
> Date: Tue Mar 5 16:40:49 2024 -0800<br>
> <br>
> drm/xe/arl: Add Arrow Lake H support<br>
> <br>
> ARL-H uses the same media and display IP as MTL, and a version 12.74<br>
> graphics IP (referred to as Xe_LPG+). From a driver point of view, we<br>
> should be able to just treat the whole platform as MTL and rely on<br>
> GRAPHICS_VERx100 checks to handle any spots where ARL's Xe_LPG+ needs<br>
> different handling from MTL's Xe_LPG (i.e., workarounds).<br>
> <br>
> v2: Resolve conflict and Reorder PCI ids in sorted order<br>
> v3: Append signed-off-by commiter to this commit<br>
> <br>
> Bspec: 55420<br>
> Signed-off-by: Matt Roper <<a href="mailto:matthew.d.roper@intel.com" target="_blank">matthew.d.roper@intel.com</a>><br>
> Signed-off-by: Dnyaneshwar Bhadane <<a href="mailto:dnyaneshwar.bhadane@intel.com" target="_blank">dnyaneshwar.bhadane@intel.com</a>><br>
> Reviewed-by: Matt Atwood <<a href="mailto:matthew.s.atwood@intel.com" target="_blank">matthew.s.atwood@intel.com</a>><br>
> Link: <a href="https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4" rel="noreferrer" target="_blank">https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4</a><br>
> -<a href="mailto:dnyaneshwar.bhadane@intel.com" target="_blank">dnyaneshwar.bhadane@intel.com</a><br>
> <br>
> diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h<br>
> index de1a344737bc..bc7cbef6e9d8 100644<br>
> --- a/include/drm/xe_pciids.h<br>
> +++ b/include/drm/xe_pciids.h<br>
> @@ -176,10 +176,13 @@<br>
> /* MTL / ARL */<br>
> #define XE_MTL_IDS(MACRO__, ...) \<br>
> MACRO__(0x7D40, ## __VA_ARGS__), \<br>
> + MACRO__(0x7D41, ## __VA_ARGS__), \<br>
> MACRO__(0x7D45, ## __VA_ARGS__), \<br>
> + MACRO__(0x7D51, ## __VA_ARGS__), \<br>
> MACRO__(0x7D55, ## __VA_ARGS__), \<br>
> MACRO__(0x7D60, ## __VA_ARGS__), \<br>
> MACRO__(0x7D67, ## __VA_ARGS__), \<br>
> + MACRO__(0x7DD1, ## __VA_ARGS__), \<br>
> MACRO__(0x7DD5, ## __VA_ARGS__)<br>
> <br>
> #define XE_LNL_IDS(MACRO__, ...) \<br>
> <br>
> """""<br>
> <a href="https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h" rel="noreferrer" target="_blank">https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h</a><br>
> <br>
> [Where problems could occur]<br>
> <br>
> [Other Info]<br>
> <a href="https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake" rel="noreferrer" target="_blank">https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake</a><br>
> <br>
> Matt Roper (1):<br>
> drm/xe/arl: Add Arrow Lake H support<br>
> <br>
> include/drm/xe_pciids.h | 3 +++<br>
> 1 file changed, 3 insertions(+)<br>
> <br>
<br>
Commented on the bug as well, but I don't think this is useful to <br>
backport, as ARL uses drm/i915 by default and not drm/xe. Commit <br>
bddacdf4861c0 is likely what you need instead.<br>
<br>
<br>
-- <br>
t<br>
<br>
</blockquote></div>