<div dir="ltr"><div>Sorry for my typo, BguLink is typo of BugLink.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, May 5, 2020 at 3:58 PM Koba Ko <<a href="mailto:koba.ko@canonical.com">koba.ko@canonical.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">From: <a href="https://lore.kernel.org/linux-pci/20200416083245.73957-1-mika.westerberg@linux.intel.com/" rel="noreferrer" target="_blank">https://lore.kernel.org/linux-pci/20200416083245.73957-1-mika.westerberg@linux.intel.com/</a><br>
<br>
BguLink: <a href="https://bugs.launchpad.net/bugs/1876844" rel="noreferrer" target="_blank">https://bugs.launchpad.net/bugs/1876844</a><br>
<br>
Since PCIe spec mandates that all downstream ports that support<br>
speeds greater than 5 GT/s must support data link layer active<br>
reporting so use that here to determine when the delay should<br>
be issued.<br>
<br>
Tested-by: Kai-Heng Feng <<a href="mailto:kai.heng.feng@canonical.com" target="_blank">kai.heng.feng@canonical.com</a>><br>
Signed-off-by: Mika Westerberg <<a href="mailto:mika.westerberg@linux.intel.com" target="_blank">mika.westerberg@linux.intel.com</a>><br>
Signed-off-by: Koba Ko <<a href="mailto:koba.ko@canonical.com" target="_blank">koba.ko@canonical.com</a>><br>
---<br>
 drivers/pci/pci.c | 8 +++++++-<br>
 1 file changed, 7 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c<br>
index 57acc8a26336..9063ed80f87c 100644<br>
--- a/drivers/pci/pci.c<br>
+++ b/drivers/pci/pci.c<br>
@@ -4751,7 +4751,13 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)<br>
        if (!pcie_downstream_port(dev))<br>
                return;<br>
<br>
-       if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {<br>
+       /*<br>
+        * Since PCIe spec mandates that all downstream ports that<br>
+        * support speeds greater than 5 GT/s must support data link<br>
+        * layer active reporting we use that here to determine when the<br>
+        * delay should be issued.<br>
+        */<br>
+       if (!dev->link_active_reporting) {<br>
                pci_dbg(dev, "waiting %d ms for downstream link\n", delay);<br>
                msleep(delay);<br>
        } else {<br>
-- <br>
2.17.1<br>
<br>
</blockquote></div></div>