[SRU][N/J:linux][PATCH 2/4] powerpc/bpf/64: add support for BPF_ATOMIC bitwise operations

[Andrei Gherzan]

On Tue, 30 Jun 2026 at 17:58, Andrei Gherzan <andrei.gherzan at canonical.com>
wrote:

> BugLink: https://bugs.launchpad.net/bugs/1955011


Wrong subject series tag and missed the cover letter - scripts have failed.
I will send a v2.


>
>
> Adding instructions for ppc64 for
>
> atomic[64]_and
> atomic[64]_or
> atomic[64]_xor
>
> Signed-off-by: Hari Bathini <hbathini at linux.ibm.com>
> Tested-by: Naveen N. Rao <naveen.n.rao at linux.vnet.ibm.com> (ppc64le)
> Reviewed-by: Naveen N. Rao <naveen.n.rao at linux.vnet.ibm.com>
> Signed-off-by: Michael Ellerman <mpe at ellerman.id.au>
> Link:
> https://lore.kernel.org/r/20220610155552.25892-2-hbathini@linux.ibm.com
> (backported from commit 65112709115f48f16d7082bcabf173d08622e69f)
> [agherzan: Context adjustment - used b2p[TMP_REG_x] notation consistent
>  with existing Ubuntu Jammy code instead of upstream's tmp1_reg/tmp2_reg
>  local variables. Used BPF_SIZE(code) inline instead of separate size
>  variable.]
> Signed-off-by: Andrei Gherzan <andrei.gherzan at canonical.com>
> ---
>  arch/powerpc/net/bpf_jit_comp64.c | 57 ++++++++++++++++---------------
>  1 file changed, 29 insertions(+), 28 deletions(-)
>
> diff --git a/arch/powerpc/net/bpf_jit_comp64.c
> b/arch/powerpc/net/bpf_jit_comp64.c
> index 6f4a7bcf53aa..b3729f511ac0 100644
> --- a/arch/powerpc/net/bpf_jit_comp64.c
> +++ b/arch/powerpc/net/bpf_jit_comp64.c
> @@ -742,41 +742,42 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32
> *image, struct codegen_context *
>                  * BPF_STX ATOMIC (atomic ops)
>                  */
>                 case BPF_STX | BPF_ATOMIC | BPF_W:
> -                       if (imm != BPF_ADD) {
> -                               pr_err_ratelimited(
> -                                       "eBPF filter atomic op code %02x
> (@%d) unsupported\n",
> -                                       code, i);
> -                               return -ENOTSUPP;
> -                       }
> -
> -                       /* *(u32 *)(dst + off) += src */
> -
> -                       /* Get EA into TMP_REG_1 */
> -                       EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], dst_reg, off));
> +               case BPF_STX | BPF_ATOMIC | BPF_DW:
> +                       /* Get offset into TMP_REG_1 */
> +                       EMIT(PPC_RAW_LI(b2p[TMP_REG_1], off));
>                         tmp_idx = ctx->idx * 4;
>                         /* load value from memory into TMP_REG_2 */
> -                       EMIT(PPC_RAW_LWARX(b2p[TMP_REG_2], 0,
> b2p[TMP_REG_1], 0));
> -                       /* add value from src_reg into this */
> -                       EMIT(PPC_RAW_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2],
> src_reg));
> -                       /* store result back */
> -                       EMIT(PPC_RAW_STWCX(b2p[TMP_REG_2], 0,
> b2p[TMP_REG_1]));
> -                       /* we're done if this succeeded */
> -                       PPC_BCC_SHORT(COND_NE, tmp_idx);
> -                       break;
> -               case BPF_STX | BPF_ATOMIC | BPF_DW:
> -                       if (imm != BPF_ADD) {
> +                       if (BPF_SIZE(code) == BPF_DW)
> +                               EMIT(PPC_RAW_LDARX(b2p[TMP_REG_2],
> b2p[TMP_REG_1], dst_reg, 0));
> +                       else
> +                               EMIT(PPC_RAW_LWARX(b2p[TMP_REG_2],
> b2p[TMP_REG_1], dst_reg, 0));
> +
> +                       switch (imm) {
> +                       case BPF_ADD:
> +                               EMIT(PPC_RAW_ADD(b2p[TMP_REG_2],
> b2p[TMP_REG_2], src_reg));
> +                               break;
> +                       case BPF_AND:
> +                               EMIT(PPC_RAW_AND(b2p[TMP_REG_2],
> b2p[TMP_REG_2], src_reg));
> +                               break;
> +                       case BPF_OR:
> +                               EMIT(PPC_RAW_OR(b2p[TMP_REG_2],
> b2p[TMP_REG_2], src_reg));
> +                               break;
> +                       case BPF_XOR:
> +                               EMIT(PPC_RAW_XOR(b2p[TMP_REG_2],
> b2p[TMP_REG_2], src_reg));
> +                               break;
> +                       default:
>                                 pr_err_ratelimited(
>                                         "eBPF filter atomic op code %02x
> (@%d) unsupported\n",
>                                         code, i);
> -                               return -ENOTSUPP;
> +                               return -EOPNOTSUPP;
>                         }
> -                       /* *(u64 *)(dst + off) += src */
>
> -                       EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], dst_reg, off));
> -                       tmp_idx = ctx->idx * 4;
> -                       EMIT(PPC_RAW_LDARX(b2p[TMP_REG_2], 0,
> b2p[TMP_REG_1], 0));
> -                       EMIT(PPC_RAW_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2],
> src_reg));
> -                       EMIT(PPC_RAW_STDCX(b2p[TMP_REG_2], 0,
> b2p[TMP_REG_1]));
> +                       /* store result back */
> +                       if (BPF_SIZE(code) == BPF_DW)
> +                               EMIT(PPC_RAW_STDCX(b2p[TMP_REG_2],
> b2p[TMP_REG_1], dst_reg));
> +                       else
> +                               EMIT(PPC_RAW_STWCX(b2p[TMP_REG_2],
> b2p[TMP_REG_1], dst_reg));
> +                       /* we're done if this succeeded */
>                         PPC_BCC_SHORT(COND_NE, tmp_idx);
>                         break;
>
> --
> 2.43.0
>
>

-- 
Andrei Gherzan
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