[SRU][N:linux-hwe-7.0/R][PULL] perf/x86: SIMD/eGPRs/SSP register sampling and Intel PMU fixes
Jie Wang
jie.wang at intel.com
Thu Jul 30 16:03:12 UTC 2026
BugLink: https://bugs.launchpad.net/bugs/2162037
SRU Justification:
[ Impact ]
Intel Panther Lake (and later arch-PEBS capable) CPUs support sampling of
the wide register files (XMM/YMM/ZMM/OPMASK), the extended GPRs (R16-R31),
and the shadow stack pointer (SSP) via arch-PEBS. The resolute (26.04, 7.0)
kernel does not enable perf sampling of these registers, so profiling tools
cannot capture SIMD/eGPR/SSP state on this hardware. This series also carries
a set of x86 PMU init/hybrid-PMU robustness fixes that the feature depends on
(error-path leaks, hybrid PMU cast guards, PEBS drain reentry, etc.).
[ Fix ]
Backport of two upstream perf/x86 series (kernel side):
1) perf/x86: miscellaneous PMU bug fixes and optimizations (8 patches)
https://lore.kernel.org/all/20260717080342.1879573-1-dapeng1.mi@linux.intel.com/
2) Support SIMD/eGPRs/SSP registers sampling for perf - kernel (23 patches)
https://lore.kernel.org/all/20260721062506.3745816-1-dapeng1.mi@linux.intel.com/
These are not yet in Linus' tree, so they are carried as UBUNTU: SAUCE:
patches with a BugLink and provenance to the LKML postings above.
NOTE: The corresponding perf *tools* series
(https://lore.kernel.org/all/20260721072707.3787848-1-dapeng1.mi@linux.intel.com/)
is intentionally NOT included here. resolute's tools/perf is an older
generation and that series requires non-trivial adaptation (a function-level
refactor of the perf-script register-dump path). The kernel ABI enabled here
is complete on its own.
[ Test Plan ]
On an arch-PEBS capable Intel platform with a perf built from a tree that
has the tools-side support:
# perf record -I=? # lists XMM/YMM/ZMM/OPMASK/R16-R31/SSP
# perf record -e cycles:p -Iax,xmm,ymm,zmm,opmask,ssp -c 100000 -- <workload>
# perf report -D | head # verify the wide registers are captured
Also verify a normal boot + `perf top`/`perf record` regression run on
non-arch-PEBS hardware shows no change in behaviour.
[ Where problems could occur ]
Changes are confined to x86 perf events core (arch/x86/events, kernel/events,
x86 fpu/xstate NMI helpers) plus the perf UAPI header. Risk is in the PMU
init/hybrid and PEBS drain paths; a regression would most likely surface as a
PMU init failure, incorrect sampling, or an NMI/xstate issue during PEBS
sampling. The bug-fix patches (series 1) reduce pre-existing error-path risk.
[ Other Info ]
This targets the resolute (26.04) 7.0 GA kernel [R] and the noble (24.04)
linux-hwe-7.0 kernel [N:linux-hwe-7.0]. The identical 31-patch set applies
cleanly to both resolute master-next (7.0.14) and noble hwe-7.0-next (7.0.12).
The pull branch below is based on resolute master-next; the same commits apply
cleanly on top of noble hwe-7.0-next (a noble-based branch can be provided on
request if a separate pull is preferred for that tree).
The following changes since commit 42c1aae459f558fc52384c760b92c32ffd1d9f46:
UBUNTU: Upstream stable to v6.18.38, v7.1.3 (2026-07-17 12:01:46 +0200)
are available in the Git repository at:
https://github.com/wangjie220704/linux_resolute sru-perf-7.0
for you to fetch changes up to 671b27c251cf780fe3ecba5f76f8a9a60b400161:
UBUNTU: SAUCE: perf/x86/intel: Add sanity check for PEBS record/fragment size (2026-07-29 16:05:04 +0000)
----------------------------------------------------------------
Dapeng Mi (28):
UBUNTU: SAUCE: perf/x86: Unregister PMI handler on PMU init failure
UBUNTU: SAUCE: perf/x86: Free hybrid state on PMU init failure
UBUNTU: SAUCE: perf/x86: Guard intel_pmu_cpu_dead() against invalid hybrid PMU casts
UBUNTU: SAUCE: perf/x86/intel: Unwind cpuc state if PEBS buffer setup fails
UBUNTU: SAUCE: perf/x86: Remove stale fixed counter helper and fix hybrid PMU access
UBUNTU: SAUCE: perf/x86/intel: Fix intel_cap handling on hybrid PMUs
UBUNTU: SAUCE: perf/x86: Optimize ACR handling in match_prev_assignment()
UBUNTU: SAUCE: perf/x86/intel: Prevent drain_pebs() reentry
UBUNTU: SAUCE: perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu()
UBUNTU: SAUCE: perf/x86/intel: Enable large PEBS sampling for XMMs
UBUNTU: SAUCE: perf/x86/intel: Convert x86_perf_regs to per-cpu variables
UBUNTU: SAUCE: perf: Eliminate duplicate arch-specific function definitions
UBUNTU: SAUCE: perf/x86: Use x86_perf_regs in NMI handlers
UBUNTU: SAUCE: x86/fpu: Add update_fpu_state_and_flag() helper
UBUNTU: SAUCE: perf/x86/intel: Centralize PERF_PMU_CAP_EXTENDED_REGS updates
UBUNTU: SAUCE: perf/x86: Enable XMM register sampling for non-PEBS events
UBUNTU: SAUCE: perf/x86: Enable XMM register sampling for REGS_USER case
UBUNTU: SAUCE: perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields
UBUNTU: SAUCE: perf/x86: Support YMM sampling using sample_simd_vec_reg_* fields
UBUNTU: SAUCE: perf/x86: Support ZMM sampling using sample_simd_vec_reg_* fields
UBUNTU: SAUCE: perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields
UBUNTU: SAUCE: perf: Enhance perf_reg_validate() with simd_enabled argument
UBUNTU: SAUCE: perf/x86: Support eGPRs sampling using sample_regs_* fields
UBUNTU: SAUCE: perf/x86: Support SSP sampling using sample_regs_* fields
UBUNTU: SAUCE: perf/x86/intel: Support arch-PEBS based SIMD/eGPRs sampling
UBUNTU: SAUCE: perf/x86/intel: Advertise PERF_PMU_CAP_SIMD_REGS capability
UBUNTU: SAUCE: perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs
UBUNTU: SAUCE: perf/x86/intel: Add sanity check for PEBS record/fragment size
Kan Liang (3):
UBUNTU: SAUCE: x86/fpu/xstate: Add xsaves_nmi() helper
UBUNTU: SAUCE: perf: Move and enhance has_extended_regs() for arch-specific use
UBUNTU: SAUCE: perf: Add sampling support for SIMD registers
arch/arm/kernel/perf_regs.c | 8 +-
arch/arm64/kernel/perf_regs.c | 8 +-
arch/csky/kernel/perf_regs.c | 8 +-
arch/loongarch/kernel/perf_regs.c | 8 +-
arch/mips/kernel/perf_regs.c | 8 +-
arch/parisc/kernel/perf_regs.c | 8 +-
arch/powerpc/perf/perf_regs.c | 2 +-
arch/riscv/kernel/perf_regs.c | 8 +-
arch/s390/kernel/perf_regs.c | 2 +-
arch/x86/events/core.c | 528 ++++++++++++++++++++++++++++++++--
arch/x86/events/intel/core.c | 209 +++++++++++---
arch/x86/events/intel/ds.c | 239 +++++++++++----
arch/x86/events/perf_event.h | 220 +++++++++++++-
arch/x86/include/asm/fpu/sched.h | 5 +-
arch/x86/include/asm/fpu/xstate.h | 3 +
arch/x86/include/asm/msr-index.h | 7 +
arch/x86/include/asm/perf_event.h | 35 ++-
arch/x86/include/uapi/asm/perf_regs.h | 53 ++++
arch/x86/kernel/fpu/core.c | 33 ++-
arch/x86/kernel/fpu/xstate.c | 25 +-
arch/x86/kernel/perf_regs.c | 174 +++++++++--
arch/x86/xen/pmu.c | 5 +-
include/linux/perf_event.h | 23 ++
include/linux/perf_regs.h | 36 +--
include/uapi/linux/perf_event.h | 49 +++-
kernel/events/core.c | 177 ++++++++++--
26 files changed, 1603 insertions(+), 278 deletions(-)
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