[P:linux-unstable][PATCH 4/7] UBUNTU: [Config] riscv64: Enable Svpbmt support

Emil Renner Berthing emil.renner.berthing at canonical.com
Mon Feb 17 10:15:27 UTC 2025


The page-based memory types is the proper RISC-V extension needed to
support non-coherent peripheral DMAs. Previously this has been done in
two different non-standard ways for the Allwinner D1 and StarFive JH7100
SoCs, but now the proper extension is implemented in the SpacemiT K1 and
hopefully in all future non-coherent SoCs.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
---
 debian.master/config/annotations | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/debian.master/config/annotations b/debian.master/config/annotations
index 4f2072460469..03a0ae0dcbc5 100644
--- a/debian.master/config/annotations
+++ b/debian.master/config/annotations
@@ -11467,7 +11467,7 @@ CONFIG_RISCV_ISA_C                              policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_FALLBACK                       policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_SUPM                           policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_SVNAPOT                        policy<{'riscv64': 'y'}>
-CONFIG_RISCV_ISA_SVPBMT                         policy<{'riscv64': 'n'}>
+CONFIG_RISCV_ISA_SVPBMT                         policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_V                              policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_VENDOR_EXT                     policy<{'riscv64': 'y'}>
 CONFIG_RISCV_ISA_VENDOR_EXT_ANDES               policy<{'riscv64': 'n'}>
-- 
2.43.0




More information about the kernel-team mailing list