ACK: [SRU][Jammy][PATCH 0/1] Add split lock detection for EMR

[Tim Gardner]

On 4/13/23 7:21 AM, Roxana Nicolescu wrote:
> BugLink: https://bugs.launchpad.net/bugs/2015855
> 
> SRU Justification
> 
> [Impact]
> Intel has introduced support for their new Emerald Rapids CPU.
> It was backported to Jammy in #lp2015372
> 
> The remaining feature needed to fully support EMR is the split lock
> detection mechanism.
> So far, bit 5 in IA32_CORE_CAPABILITIES says whether split lock
> detection is supported or not, but this is not architectural, meaning
> that this should be trusted only if it’s confirmed that a specific CPU
> model implements it. This lead to a mapping between a CPU model and
> whether it supports split lock detection by default (no need to check
> IA32_CORE_CAPABILITIES) or they may support the split lock detection
> and IA32_CORE_CAPABILITIES bit 5 has to be checked.
> 
> With more and more CPU models, this becomes hard to maintain.
> Moreover, the December 2022 edition of the Intel Instruction Set
> Extensions manual defined that the split lock disable bit in the
> IA32_CORE_CAPABILITIES MSR is (and retrospectively always has been)
> architectural. Documentation also mentions “All processors that
> enumerate support for MSR_IA32_CORE_CAPS and set
> MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT support split lock detection.”
> 
> Thus, commit d7ce15e1d4162ab5e56dead10d4ae69a6b5c8ee8:
> “ x86/split_lock: Enumerate architectural split lock disable bit”
> from linux-next removes the need of adding a new CPU model in that
> mapping.
> 
> This is needed to support split lock detection for the new EMR CPU and
> future models that don’t suffer architectural changes.
> 
> [Testing]
>   Kernel was built on cbd and boot tested on a VM.
> Intel was asked to install and test the new kernel from this ppa
> https://launchpad.net/~roxanan/+archive/ubuntu/lp2015855
> 
> [Regression potential]
>   Very low, it is a small refactor and in essence, it does the exact
>   same thing for existing cpu models:
> 1. For Icelake which does not have IA32_CORE_CAPABILITIES it always
> assumes the mechanism is supported.
> 2. For the rest, it automatically checks bit 5 of
> IA32_CORE_CAPABILITIES without the extra step of checking the map if
> the CPU supports this (which was always true)
> 
> Fenghua Yu (1):
>    x86/split_lock: Enumerate architectural split lock disable bit
> 
>   arch/x86/kernel/cpu/intel.c | 58 ++++++++++++++-----------------------
>   1 file changed, 22 insertions(+), 36 deletions(-)
> 
Acked-by: Tim Gardner <tim.gardner at canonical.com>

LGTM
-- 
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Tim Gardner
Canonical, Inc