ACK: [SRU][Jammy:linux-intel-iotg][PATCH v2 1/1] bus: mhi: pci_generic: Add mru_default for Quectel EM1xx series

Philip Cox philip.cox at canonical.com
Mon May 16 18:51:56 UTC 2022


Acked-By: Philip Cox <philip.cox at canonical.com>

On 2022-05-10 11:03 p.m., Jian Hui Lee wrote:
> From: Yonglin Tan <yonglin.tan at outlook.com>
>
> BugLink: https://bugs.launchpad.net/bugs/1967257
>
> For default mechanism, the driver uses default MRU 3500 if mru_default
> is not initialized. The Qualcomm configured the MRU size to 32768 in the
> WWAN device FW. So, we align the driver setting with Qualcomm FW setting.
>
> Link: https://lore.kernel.org/r/MEYP282MB2374EE345DADDB591AFDA6AFFD2E9@MEYP282MB2374.AUSP282.PROD.OUTLOOK.COM
> Fixes: ac4bf60bbaa0 ("bus: mhi: pci_generic: Introduce quectel EM1XXGR-L support")
> Cc: stable at vger.kernel.org
> Reviewed-by: Manivannan Sadhasivam <mani at kernel.org>
> Signed-off-by: Yonglin Tan <yonglin.tan at outlook.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> Link: https://lore.kernel.org/r/20220301160308.107452-2-manivannan.sadhasivam@linaro.org
> Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
> (cherry picked from commit 2413ffbf19a95cfcd7adf63135c5a9343a66d0a2)
> Signed-off-by: Jian Hui Lee <jianhui.lee at canonical.com>
> ---
>   drivers/bus/mhi/pci_generic.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index d340d6864e13..d243526b23d8 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -327,6 +327,7 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
>   	.config = &modem_quectel_em1xx_config,
>   	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
>   	.dma_data_width = 32,
> +	.mru_default = 32768,
>   	.sideband_wake = true,
>   };
>   



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