ACK/cmnt: [H][PATCH 1/1] drm/amd/display: use max lb for latency hiding
Juerg Haefliger
juerg.haefliger at canonical.com
Wed May 26 06:10:16 UTC 2021
On Wed, 26 May 2021 13:40:22 +0800
Aaron Ma <aaron.ma at canonical.com> wrote:
> From: Dmytro Laktyushkin <Dmytro.Laktyushkin at amd.com>
>
> BugLink: https://bugs.launchpad.net/bugs/1929646
>
> Enable max memory lb config to improve stutter efficiency and
> latency hiding. Also increase max number of lb lines to be
> used by dml since experiments have shown that there isnt a hard max
> beyond what fits in lb.
>
> Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>
> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin at amd.com>
> Reviewed-by: Eric Bernstein <Eric.Bernstein at amd.com>
> Acked-by: Solomon Chiu <solomon.chiu at amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> (backported from commit 9d335e17646c41d2781ee583b1512fc11e5d59aa)
We're not enforcing it but we like a short description of what needed to be
changed, enclosed in square brackets. See other commits in the tree for
examples.
> Signed-off-by: Aaron Ma <aaron.ma at canonical.com>
Acked-by: Juerg Haefliger <juergh at canonical.com>
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 +++-
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 6 ++++--
> drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 9 ++++++---
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 4 +++-
> drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 4 +++-
> 6 files changed, 20 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> index 90e912fef2b3..33811953585b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> @@ -82,7 +82,7 @@ const struct _vcs_dpi_ip_params_st dcn1_0_ip = {
> .meta_chunk_size_kbytes = 2,
> .writeback_chunk_size_kbytes = 2,
> .line_buffer_size_bits = 589824,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .IsLineBufferBppFixed = 0,
> .LineBufferFixedBpp = -1,
> .writeback_luma_buffer_size_kbytes = 12,
> @@ -619,6 +619,7 @@ static const struct dc_debug_options debug_defaults_drv = {
> .recovery_enabled = false, /*enable this by default after testing.*/
> .max_downscale_src_width = 3840,
> .underflow_assert_delay_us = 0xFFFFFFFF,
> + .use_max_lb = true
> };
>
> static const struct dc_debug_options debug_defaults_diags = {
> @@ -630,6 +631,7 @@ static const struct dc_debug_options debug_defaults_diags = {
> .disable_pplib_clock_request = true,
> .disable_pplib_wm_range = true,
> .underflow_assert_delay_us = 0xFFFFFFFF,
> + .use_max_lb = true
> };
>
> static void dcn10_dpp_destroy(struct dpp **dpp)
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> index 354c2a2702d7..ff0f749b1e97 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> @@ -112,7 +112,7 @@ struct _vcs_dpi_ip_params_st dcn2_0_ip = {
> .is_line_buffer_bpp_fixed = 0,
> .line_buffer_fixed_bpp = 0,
> .dcc_supported = true,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12,
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> @@ -180,7 +180,7 @@ static struct _vcs_dpi_ip_params_st dcn2_0_nv14_ip = {
> .is_line_buffer_bpp_fixed = 0,
> .line_buffer_fixed_bpp = 0,
> .dcc_supported = true,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12,
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> @@ -1075,6 +1075,7 @@ static const struct dc_debug_options debug_defaults_drv = {
> .scl_reset_length10 = true,
> .sanity_checks = false,
> .underflow_assert_delay_us = 0xFFFFFFFF,
> + .use_max_lb = true
> };
>
> static const struct dc_debug_options debug_defaults_diags = {
> @@ -1091,6 +1092,7 @@ static const struct dc_debug_options debug_defaults_diags = {
> .scl_reset_length10 = true,
> .underflow_assert_delay_us = 0xFFFFFFFF,
> .enable_tri_buf = true,
> + .use_max_lb = true
> };
>
> void dcn20_dpp_destroy(struct dpp **dpp)
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
> index 4a3df13c9e49..70ca1c1c9690 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
> @@ -116,7 +116,7 @@ struct _vcs_dpi_ip_params_st dcn2_1_ip = {
> .is_line_buffer_bpp_fixed = 0,
> .line_buffer_fixed_bpp = 0,
> .dcc_supported = true,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12,
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> @@ -883,7 +883,9 @@ static const struct dc_debug_options debug_defaults_drv = {
> .scl_reset_length10 = true,
> .sanity_checks = true,
> .disable_48mhz_pwrdwn = false,
> - .usbc_combo_phy_reset_wa = true
> + .usbc_combo_phy_reset_wa = true,
> + .dmub_command_table = true,
> + .use_max_lb = true
> };
>
> static const struct dc_debug_options debug_defaults_diags = {
> @@ -899,7 +901,8 @@ static const struct dc_debug_options debug_defaults_diags = {
> .disable_stutter = true,
> .disable_48mhz_pwrdwn = true,
> .disable_psr = true,
> - .enable_tri_buf = true
> + .enable_tri_buf = true,
> + .use_max_lb = true
> };
>
> enum dcn20_clk_src_array_id {
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> index f90881f4458f..e2229f02567d 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> @@ -120,7 +120,7 @@ struct _vcs_dpi_ip_params_st dcn3_0_ip = {
> .dcc_supported = true,
> .writeback_interface_buffer_size_kbytes = 90,
> .writeback_line_buffer_buffer_size = 0,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12, // writeback_line_buffer_buffer_size = 656640
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> @@ -852,6 +852,7 @@ static const struct dc_debug_options debug_defaults_drv = {
> .dwb_fi_phase = -1, // -1 = disable,
> .dmub_command_table = true,
> .disable_psr = false,
> + .use_max_lb = true
> };
>
> static const struct dc_debug_options debug_defaults_diags = {
> @@ -870,6 +871,7 @@ static const struct dc_debug_options debug_defaults_diags = {
> .dmub_command_table = true,
> .disable_psr = true,
> .enable_tri_buf = true,
> + .use_max_lb = true
> };
>
> void dcn30_dpp_destroy(struct dpp **dpp)
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> index 23bc208cbfa4..490eb138183f 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> @@ -116,7 +116,7 @@ struct _vcs_dpi_ip_params_st dcn3_01_ip = {
> .dcc_supported = true,
> .writeback_interface_buffer_size_kbytes = 90,
> .writeback_line_buffer_buffer_size = 656640,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12, // writeback_line_buffer_buffer_size = 656640
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> index 808c4dcdb3ac..4275f2134972 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> @@ -99,7 +99,7 @@ struct _vcs_dpi_ip_params_st dcn3_02_ip = {
> .dcc_supported = true,
> .writeback_interface_buffer_size_kbytes = 90,
> .writeback_line_buffer_buffer_size = 0,
> - .max_line_buffer_lines = 12,
> + .max_line_buffer_lines = 32,
> .writeback_luma_buffer_size_kbytes = 12, // writeback_line_buffer_buffer_size = 656640
> .writeback_chroma_buffer_size_kbytes = 8,
> .writeback_chroma_line_buffer_width_pixels = 4,
> @@ -221,6 +221,7 @@ static const struct dc_debug_options debug_defaults_drv = {
> .underflow_assert_delay_us = 0xFFFFFFFF,
> .dwb_fi_phase = -1, // -1 = disable,
> .dmub_command_table = true,
> + .use_max_lb = true
> };
>
> static const struct dc_debug_options debug_defaults_diags = {
> @@ -238,6 +239,7 @@ static const struct dc_debug_options debug_defaults_diags = {
> .dwb_fi_phase = -1, // -1 = disable
> .dmub_command_table = true,
> .enable_tri_buf = true,
> + .use_max_lb = true
> };
>
> enum dcn302_clk_src_array_id {
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