[SRU][G/linux-oracle][PATCH 06/18] perf: Add Arm CMN-600 DT binding
Khalid Elmously
khalid.elmously at canonical.com
Fri May 21 07:00:30 UTC 2021
From: Robin Murphy <robin.murphy at arm.com>
BugLink: https://bugs.launchpad.net/bugs/1925421
Document the requirements for the CMN-600 DT binding. The internal
topology is almost entirely discoverable by walking a tree of ID
registers, but sadly both the starting point for that walk and the
exact format of those registers are configuration-dependent and not
discoverable from some sane fixed location. Oh well.
Signed-off-by: Robin Murphy <robin.murphy at arm.com>
Signed-off-by: Will Deacon <will at kernel.org>
(cherry picked from commit c8fdbbfa981a7bc64acec234620788c97d1f6a88)
Signed-off-by: Khalid Elmously <khalid.elmously at canonical.com>
---
.../devicetree/bindings/perf/arm,cmn.yaml | 57 +++++++++++++++++++
debian.oracle/config/config.common.ubuntu | 1 +
2 files changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/arm,cmn.yaml
diff --git a/Documentation/devicetree/bindings/perf/arm,cmn.yaml b/Documentation/devicetree/bindings/perf/arm,cmn.yaml
new file mode 100644
index 000000000000..e4fcc0de25e2
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/arm,cmn.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2020 Arm Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm CMN (Coherent Mesh Network) Performance Monitors
+
+maintainers:
+ - Robin Murphy <robin.murphy at arm.com>
+
+properties:
+ compatible:
+ const: arm,cmn-600
+
+ reg:
+ items:
+ - description: Physical address of the base (PERIPHBASE) and
+ size (up to 64MB) of the configuration address space.
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+ items:
+ - description: Overflow interrupt for DTC0
+ - description: Overflow interrupt for DTC1
+ - description: Overflow interrupt for DTC2
+ - description: Overflow interrupt for DTC3
+ description: One interrupt for each DTC domain implemented must
+ be specified, in order. DTC0 is always present.
+
+ arm,root-node:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Offset from PERIPHBASE of the configuration
+ discovery node (see TRM definition of ROOTNODEBASE).
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - arm,root-node
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ pmu at 50000000 {
+ compatible = "arm,cmn-600";
+ reg = <0x50000000 0x4000000>;
+ /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ arm,root-node = <0x104000>;
+ };
+...
diff --git a/debian.oracle/config/config.common.ubuntu b/debian.oracle/config/config.common.ubuntu
index 442dc5e19149..377cb3c4ed52 100644
--- a/debian.oracle/config/config.common.ubuntu
+++ b/debian.oracle/config/config.common.ubuntu
@@ -511,6 +511,7 @@ CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
# CONFIG_ARM_CCI_PMU is not set
# CONFIG_ARM_CCN is not set
+CONFIG_ARM_CMN=m
# CONFIG_ARM_CPUIDLE is not set
# CONFIG_ARM_DSU_PMU is not set
CONFIG_ARM_GIC=y
--
2.17.1
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