ACK/Cmnt: [SRU][F:linux-bluefield][PATCH v1 1/1] UBUNTU: SAUCE: mlxbf_gige: syncup with v1.21 content
Stefan Bader
stefan.bader at canonical.com
Wed May 5 08:54:15 UTC 2021
On 04.05.21 21:22, David Thompson wrote:
> BugLink: https://bugs.launchpad.net/bugs/1927134
>
> This delivery provides a syncup of the mlxbf_gige driver
> with the Mellanox-internal v1.21 content.
>
> a) v1.20 changes - properly handle negotiated pause settings
> This delivery updates the logic in mlxbf_gige_adjust_link()
> to store the negotiated pause settings into the driver's
> private settings. The pause settings, as reported by the
> PHY device when link comes up, are thereafter returned in
> the get_pauseparam() driver callback.
>
> b) v1.21 changes - modify copyright notice from Nvidia back to Mellanox
>
> Reviewed-by: Asmaa Mnebhi <asmaa at nvidia.com>
> Signed-off-by: David Thompson <davthompson at nvidia.com>
Acked-by: Stefan Bader <stefan.bader at canonical.com>
> ---
The regression potential in the should say _what_ a user might most likely
experience _if_ things do not work like expected. Like which area or
functionality would show incorrect behaviour.
-Stefan
> .../net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h | 2 +-
> .../mellanox/mlxbf_gige/mlxbf_gige_ethtool.c | 6 +--
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c | 2 +-
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c | 51 ++++++++++++++--------
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c | 2 +-
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h | 2 +-
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c | 2 +-
> .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c | 2 +-
> 8 files changed, 41 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
> index e8cf26f..1c59cad 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
> @@ -4,7 +4,7 @@
> * - this file contains software data structures and any chip-specific
> * data structures (e.g. TX WQE format) that are memory resident.
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #ifndef __MLXBF_GIGE_H__
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
> index 55b5d67..1d68b8b 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
> @@ -2,7 +2,7 @@
>
> /* Ethtool support for Mellanox Gigabit Ethernet driver
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/phy.h>
> @@ -158,8 +158,8 @@ static void mlxbf_gige_get_pauseparam(struct net_device *netdev,
> struct mlxbf_gige *priv = netdev_priv(netdev);
>
> pause->autoneg = priv->aneg_pause;
> - pause->rx_pause = priv->tx_pause;
> - pause->tx_pause = priv->rx_pause;
> + pause->rx_pause = priv->rx_pause;
> + pause->tx_pause = priv->tx_pause;
> }
>
> const struct ethtool_ops mlxbf_gige_ethtool_ops = {
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c
> index f67826a..c63a74d 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c
> @@ -2,7 +2,7 @@
>
> /* Interrupt related logic for Mellanox Gigabit Ethernet driver
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/interrupt.h>
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
> index c5ffa68..2513c35 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
> @@ -2,7 +2,7 @@
>
> /* Gigabit Ethernet driver for Mellanox BlueField SoC
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/acpi.h>
> @@ -21,7 +21,12 @@
> #include "mlxbf_gige_regs.h"
>
> #define DRV_NAME "mlxbf_gige"
> -#define DRV_VERSION 1.19
> +#define DRV_VERSION 1.21
> +
> +/* This setting defines the version of the ACPI table
> + * content that is compatible with this driver version.
> + */
> +#define MLXBF_GIGE_ACPI_TABLE_VERSION 1
>
> /* Allocate SKB whose payload pointer aligns with the Bluefield
> * hardware DMA limitation, i.e. DMA operation can't cross
> @@ -71,6 +76,7 @@ static void mlxbf_gige_initial_mac(struct mlxbf_gige *priv)
> u8 mac[ETH_ALEN];
> u64 local_mac;
>
> + memset(mac, 0, ETH_ALEN);
> mlxbf_gige_get_mac_rx_filter(priv, MLXBF_GIGE_LOCAL_MAC_FILTER_IDX,
> &local_mac);
> u64_to_ether_addr(local_mac, mac);
> @@ -212,8 +218,8 @@ static void mlxbf_gige_set_rx_mode(struct net_device *netdev)
> mlxbf_gige_enable_promisc(priv);
> else
> mlxbf_gige_disable_promisc(priv);
> - }
> -}
> + }
> + }
>
> static void mlxbf_gige_get_stats64(struct net_device *netdev,
> struct rtnl_link_stats64 *stats)
> @@ -247,7 +253,15 @@ static const struct net_device_ops mlxbf_gige_netdev_ops = {
>
> static void mlxbf_gige_adjust_link(struct net_device *netdev)
> {
> - /* Only one speed and one duplex supported, simply return */
> + struct mlxbf_gige *priv = netdev_priv(netdev);
> + struct phy_device *phydev = netdev->phydev;
> +
> + if (phydev->link) {
> + priv->rx_pause = phydev->pause;
> + priv->tx_pause = phydev->pause;
> + }
> +
> + phy_print_status(phydev);
> }
>
> static int mlxbf_gige_probe(struct platform_device *pdev)
> @@ -262,18 +276,21 @@ static int mlxbf_gige_probe(struct platform_device *pdev)
> void __iomem *llu_base;
> void __iomem *plu_base;
> void __iomem *base;
> - int addr, version;
> + u32 version;
> u64 control;
> - int err = 0;
> + int addr;
> + int err;
>
> - if (device_property_read_u32(&pdev->dev, "version", &version)) {
> - dev_err(&pdev->dev, "Version Info not found\n");
> + version = 0;
> + err = device_property_read_u32(&pdev->dev, "version", &version);
> + if (err) {
> + dev_err(&pdev->dev, "ACPI table version not found\n");
> return -EINVAL;
> }
>
> - if (version != (int)DRV_VERSION) {
> - dev_err(&pdev->dev, "Version Mismatch. Expected %d Returned %d\n",
> - (int)DRV_VERSION, version);
> + if (version != MLXBF_GIGE_ACPI_TABLE_VERSION) {
> + dev_err(&pdev->dev, "ACPI table version mismatch: expected %d found %d\n",
> + MLXBF_GIGE_ACPI_TABLE_VERSION, version);
> return -EINVAL;
> }
>
> @@ -367,10 +384,6 @@ static int mlxbf_gige_probe(struct platform_device *pdev)
> addr = phydev->mdio.addr;
> phydev->irq = priv->mdiobus->irq[addr] = priv->phy_irq;
>
> - /* Sets netdev->phydev to phydev; which will eventually
> - * be used in ioctl calls.
> - * Cannot pass NULL handler.
> - */
> err = phy_connect_direct(netdev, phydev,
> mlxbf_gige_adjust_link,
> PHY_INTERFACE_MODE_GMII);
> @@ -390,9 +403,9 @@ static int mlxbf_gige_probe(struct platform_device *pdev)
> /* MAC supports symmetric flow control */
> phy_support_sym_pause(phydev);
>
> - /* Enable pause */
> - priv->rx_pause = phydev->pause;
> - priv->tx_pause = phydev->pause;
> + /* Initialise pause frame settings */
> + priv->rx_pause = 0;
> + priv->tx_pause = 0;
> priv->aneg_pause = AUTONEG_ENABLE;
>
> /* Display information about attached PHY device */
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
> index af4a754..d164317 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
> @@ -2,7 +2,7 @@
>
> /* MDIO support for Mellanox Gigabit Ethernet driver
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/acpi.h>
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
> index 30ad896..d4652f9 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
> @@ -2,7 +2,7 @@
>
> /* Header file for Mellanox BlueField GigE register defines
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #ifndef __MLXBF_GIGE_REGS_H__
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
> index 1cf8be2..9e4c507 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
> @@ -2,7 +2,7 @@
>
> /* Packet receive logic for Mellanox Gigabit Ethernet driver
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/etherdevice.h>
> diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
> index 257dd02..0c35b2f 100644
> --- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
> +++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
> @@ -2,7 +2,7 @@
>
> /* Packet transmit logic for Mellanox Gigabit Ethernet driver
> *
> - * Copyright (c) 2020-2021 NVIDIA Corporation.
> + * Copyright (C) 2020-2021 Mellanox Technologies, Ltd. ALL RIGHTS RESERVED.
> */
>
> #include <linux/skbuff.h>
>
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