NACK: [PATCH v2 0/5][SRU][linux-firmware][F] To support AMD W6600 and

Tim Gardner tim.gardner at canonical.com
Tue Jul 27 12:49:43 UTC 2021


Did you intend for this to be a pull request ? Otherwise I don't see 
patches 1-5.

rtg

On 7/27/21 5:25 AM, AceLan Kao wrote:
> From: "Chia-Lin Kao (AceLan)" <acelan.kao at canonical.com>
> 
> BugLink: https://bugs.launchpad.net/bugs/1938149
> 
> [Impact]
> To support AMD Radeon Pro W6600/W6700 graphic card, we need some new
> firmware.
> 
> [Fix]
> AMD suggests us to include below 2 commits, and to avoid conflicts I
> cherry pick sienna cichlid firmware from the beginning when it's been
> added. Impish already have both commits.
> 
> amdgpu: add initial dimgrey cavefish firmware from 21.20
> https://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/linux-firmware.git/commit/?id=87619e4114cc631efcb6868dca54d481dc467034
> 
> amdgpu: update sienna cichlid firmware from 21.20
> https://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/linux-firmware.git/commit/?id=4043da4f77f84b75a0f818ab7e83ead187ebf441
> 
> [Test]
> Verified on AMD Radeon Pro W6600 graphic card.
> 
> [Where problems could occur]
> This series of patches introduce dimgrey cavefish and sienna cichlid
> firmware. The 2 GPUs are still new and have little chance to affect old
> platforms, should be safe to include them.
> 
> Alex Deucher (5):
>    amdgpu: add sienna cichlid firmware for 20.45
>    amdgpu: update sienna cichlid firmware for 20.50
>    amdgpu: update sienna cichlid firmware from 21.10
>    amdgpu: update sienna cichlid firmware from 21.20
>    amdgpu: add initial dimgrey cavefish firmware from 21.20
> 
>   WHENCE                            |  24 ++++++++++++++++++++++++
>   amdgpu/dimgrey_cavefish_ce.bin    | Bin 0 -> 263296 bytes
>   amdgpu/dimgrey_cavefish_dmcub.bin | Bin 0 -> 104308 bytes
>   amdgpu/dimgrey_cavefish_me.bin    | Bin 0 -> 263424 bytes
>   amdgpu/dimgrey_cavefish_mec.bin   | Bin 0 -> 268592 bytes
>   amdgpu/dimgrey_cavefish_mec2.bin  | Bin 0 -> 268592 bytes
>   amdgpu/dimgrey_cavefish_pfp.bin   | Bin 0 -> 263424 bytes
>   amdgpu/dimgrey_cavefish_rlc.bin   | Bin 0 -> 134648 bytes
>   amdgpu/dimgrey_cavefish_sdma.bin  | Bin 0 -> 34048 bytes
>   amdgpu/dimgrey_cavefish_smc.bin   | Bin 0 -> 244902 bytes
>   amdgpu/dimgrey_cavefish_sos.bin   | Bin 0 -> 202224 bytes
>   amdgpu/dimgrey_cavefish_ta.bin    | Bin 0 -> 210176 bytes
>   amdgpu/dimgrey_cavefish_vcn.bin   | Bin 0 -> 530912 bytes
>   amdgpu/sienna_cichlid_ce.bin      | Bin 0 -> 263296 bytes
>   amdgpu/sienna_cichlid_dmcub.bin   | Bin 0 -> 104308 bytes
>   amdgpu/sienna_cichlid_me.bin      | Bin 0 -> 263424 bytes
>   amdgpu/sienna_cichlid_mec.bin     | Bin 0 -> 268592 bytes
>   amdgpu/sienna_cichlid_mec2.bin    | Bin 0 -> 268592 bytes
>   amdgpu/sienna_cichlid_pfp.bin     | Bin 0 -> 263424 bytes
>   amdgpu/sienna_cichlid_rlc.bin     | Bin 0 -> 128608 bytes
>   amdgpu/sienna_cichlid_sdma.bin    | Bin 0 -> 34048 bytes
>   amdgpu/sienna_cichlid_smc.bin     | Bin 0 -> 247396 bytes
>   amdgpu/sienna_cichlid_sos.bin     | Bin 0 -> 215152 bytes
>   amdgpu/sienna_cichlid_ta.bin      | Bin 0 -> 300800 bytes
>   amdgpu/sienna_cichlid_vcn.bin     | Bin 0 -> 530912 bytes
>   25 files changed, 24 insertions(+)
>   create mode 100644 amdgpu/dimgrey_cavefish_ce.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_dmcub.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_me.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_mec.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_mec2.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_pfp.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_rlc.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_sdma.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_smc.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_sos.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_ta.bin
>   create mode 100644 amdgpu/dimgrey_cavefish_vcn.bin
>   create mode 100644 amdgpu/sienna_cichlid_ce.bin
>   create mode 100644 amdgpu/sienna_cichlid_dmcub.bin
>   create mode 100644 amdgpu/sienna_cichlid_me.bin
>   create mode 100644 amdgpu/sienna_cichlid_mec.bin
>   create mode 100644 amdgpu/sienna_cichlid_mec2.bin
>   create mode 100644 amdgpu/sienna_cichlid_pfp.bin
>   create mode 100644 amdgpu/sienna_cichlid_rlc.bin
>   create mode 100644 amdgpu/sienna_cichlid_sdma.bin
>   create mode 100644 amdgpu/sienna_cichlid_smc.bin
>   create mode 100644 amdgpu/sienna_cichlid_sos.bin
>   create mode 100644 amdgpu/sienna_cichlid_ta.bin
>   create mode 100644 amdgpu/sienna_cichlid_vcn.bin
> 

-- 
-----------
Tim Gardner
Canonical, Inc



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