[PATCH v2 1/1][I/Unstable/OEM-5.13] drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0

chris.chiu at canonical.com chris.chiu at canonical.com
Mon Jul 19 16:28:39 UTC 2021

From: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>

BugLink: https://bugs.launchpad.net/bugs/1926579

TGL PSR2 hardware tracking shows momentary flicker and screen shift if
TGL Display stepping is B1 from A0.
It has been fixed from TGL Display stepping C0.

HSDES: 18015970021
HSDES: 2209313811
BSpec: 55378

v2: Add checking of PSR2 manual tracking (Jose)

Cc: José Roberto de Souza <jose.souza at intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210422160544.2427123-1-gwan-gyeong.mun@intel.com
(cherry picked from commit 8804325861be242a420d68c0175127a5947ac35a)
Signed-off-by: Chris Chiu <chris.chiu at canonical.com>
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8ada4f829cab..056dcc2ec4ce 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -804,6 +804,13 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
+	/* Wa_2209313811 */
+	if (!crtc_state->enable_psr2_sel_fetch &&
+	    IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) {
+		drm_dbg_kms(&dev_priv->drm, "PSR2 HW tracking is not supported this Display stepping\n");
+		return false;
+	}
 	if (!crtc_state->enable_psr2_sel_fetch &&
 	    (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {

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