[PATCH 1/1] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10

Aaron Ma aaron.ma at canonical.com
Wed Jul 7 07:10:00 UTC 2021

From: Ankit Nautiyal <ankit.k.nautiyal at intel.com>

BugLink: https://bugs.launchpad.net/bugs/1934864

Legacy LSPCON chip from MCA and Parade is only used for platforms
between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210208055554.24357-1-ankit.k.nautiyal@intel.com
Signed-off-by: Aaron Ma <aaron.ma at canonical.com>
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 799084b2374a..2daf59df1da7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1738,7 +1738,7 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
-#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
+#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)

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