ACK: [SRU B][PATCH] UBUNTU: SAUCE: Move SSBS snippet from arm64_elf_hwcaps to arm64_features
Stefan Bader
stefan.bader at canonical.com
Fri Jan 29 09:15:49 UTC 2021
On 22.01.21 06:29, Ike Panhc wrote:
> BugLink: https://launchpad.net/bugs/1911376
>
> The SSBS snippet in arch/arm64/kernel/cpufeature.c shall be in
> arm64_features not in arm64_elf_hwcaps. It seems when we backport
> patch d71be2b6c0e1 ("arm64: cpufeature: Detect SSBS and advertise
> to userspace") and put it in wrong place.
>
> This problem does not affect ubuntu-focal kernel.
>
> Signed-off-by: Ike Panhc <ike.pan at canonical.com>
Acked-by: Stefan Bader <stefan.bader at canonical.com>
> ---
> arch/arm64/kernel/cpufeature.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 63d44403d781..cbc61d9240a9 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1194,6 +1194,19 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .cpu_enable = cpu_clear_disr,
> },
> #endif /* CONFIG_ARM64_RAS_EXTN */
> +#ifdef CONFIG_ARM64_SSBD
> + {
> + .desc = "Speculative Store Bypassing Safe (SSBS)",
> + .capability = ARM64_SSBS,
> + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
> + .matches = has_cpuid_feature,
> + .sys_reg = SYS_ID_AA64PFR1_EL1,
> + .field_pos = ID_AA64PFR1_SSBS_SHIFT,
> + .sign = FTR_UNSIGNED,
> + .min_field_value = ID_AA64PFR1_SSBS_PSTATE_ONLY,
> + .cpu_enable = cpu_enable_ssbs,
> + },
> +#endif
> {},
> };
>
> @@ -1252,19 +1265,6 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
> HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_SSBS_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_SSBS_PSTATE_INSNS, CAP_HWCAP, HWCAP_SSBS),
> #ifdef CONFIG_ARM64_SVE
> HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, HWCAP_SVE),
> -#endif
> -#ifdef CONFIG_ARM64_SSBD
> - {
> - .desc = "Speculative Store Bypassing Safe (SSBS)",
> - .capability = ARM64_SSBS,
> - .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
> - .matches = has_cpuid_feature,
> - .sys_reg = SYS_ID_AA64PFR1_EL1,
> - .field_pos = ID_AA64PFR1_SSBS_SHIFT,
> - .sign = FTR_UNSIGNED,
> - .min_field_value = ID_AA64PFR1_SSBS_PSTATE_ONLY,
> - .cpu_enable = cpu_enable_ssbs,
> - },
> #endif
> {},
> };
>
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