[PATCH 0/1][SRU][I][OEM-5.13] AX201 BT will cause system could not enter S0i3

[AceLan Kao]

From: "Chia-Lin Kao (AceLan)" <acelan.kao at canonical.com>

BugLink: https://bugs.launchpad.net/bugs/1928047

[Impact]
Platforms with AX201 BT fail to pass the power consumption tests

[Fix]
Intel provides us the patch to fix it.
https://patchwork.kernel.org/project/intel-gfx/patch/20210325120947.11950-1-anshuman.gupta@intel.com/

Wa_14010685332 sequence toggles a SDE chicken bit on and then off as the
final step when disabling interrupts in preparation for runtime suspend.
And this sequence also fixes the issues that dispcnlunit1_cp_xosc_clkreq
clock keeps to be active on TGL-H during s2idle.

v2.
8b46cc6577f4 drm/i915: Tweaked Wa_14010685332 for all PCHs
drm-intel/drm-intel-next

[Test]
Verified on the Dell machines with AX201 BT on them.

[Where problems may occur]
This patch extend the s0ix fix from gen8 and gen11 to CNP, ICP, JSP, MCC,
TGP, and ADP PCHs, and also move the Wa_14010685332 sequence from reset
functions to suspend/resume functions. It won't affect old chips as there
is a if statement to check the pch type, and new chips require this
sequence to work well.

Anshuman Gupta (1):
  drm/i915: Tweaked Wa_14010685332 for all PCHs

 .../drm/i915/display/intel_display_power.c    | 16 +++++++-------
 drivers/gpu/drm/i915/i915_irq.c               | 21 -------------------
 2 files changed, 8 insertions(+), 29 deletions(-)

-- 
2.25.1