[PATCH 1/1][SRU][G][H][Unstable][OEM-5.10] UBUNTU: SAUCE: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0

AceLan Kao acelan.kao at canonical.com
Thu Apr 29 08:45:26 UTC 2021


From: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>

BugLink: https://bugs.launchpad.net/bugs/1926579

TGL PSR2 hardware tracking shows momentary flicker and screen shift if
TGL Display stepping is B1 from A0.
It has been fixed from TGL Display stepping C0.

HSDES: 18015970021
HSDES: 2209313811
BSpec: 55378

Cc: José Roberto de Souza <jose.souza at intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
(backported from https://patchwork.freedesktop.org/patch/430153/)
Signed-off-by: Chia-Lin Kao (AceLan) <acelan.kao at canonical.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 61fb8fdcb5e81..0eaa6f8364138 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -812,6 +812,26 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	/*
+	 * Symbolic steppings that do not match the hardware. These are valid both as gt
+	 * and display steppings as symbolic names.
+	 */
+	enum intel_step {
+		STEP_NONE = 0,
+		STEP_A0,
+		STEP_A2,
+		STEP_B0,
+		STEP_B1,
+		STEP_C0,
+		STEP_D0,
+	};
+
+	/* Wa_2209313811 */
+	if (IS_TGL_DISP_REVID(dev_priv, STEP_A0, STEP_B1)) {
+		drm_dbg_kms(&dev_priv->drm, "PSR2 is not supported this Display stepping\n");
+		return false;
+	}
+
 	tgl_dc3co_exitline_compute_config(intel_dp, crtc_state);
 	return true;
 }
-- 
2.25.1




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