[PATCH 3/8] Revert "dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC"
Dimitri John Ledkov
xnox at ubuntu.com
Thu Apr 1 11:54:52 UTC 2021
This reverts commit dc2249586f1b9558f745e65d61a4b0e383ca1714.
Signed-off-by: Dimitri John Ledkov <xnox at ubuntu.com>
---
.../devicetree/bindings/gpio/sifive,gpio.yaml | 4 +---
Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 10 +++++-----
Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 9 +++------
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ------
4 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
index b71d261ea504..a0efd8dc2538 100644
--- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
@@ -13,9 +13,7 @@ maintainers:
properties:
compatible:
items:
- - enum:
- - sifive,fu540-c000-gpio
- - sifive,fu740-c000-gpio
+ - const: sifive,fu540-c000-gpio
- const: sifive,gpio0
reg:
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index efd0f8537128..a37c9455b244 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -3,14 +3,14 @@ Device tree configuration for i2c-ocores
Required properties:
- compatible : "opencores,i2c-ocores"
"aeroflexgaisler,i2cmst"
- "sifive,<chip>-i2c", "sifive,i2c0"
+ "sifive,fu540-c000-i2c", "sifive,i2c0"
For Opencore based I2C IP block reimplemented in
+ FU540-C000 SoC.
"sifive,fu740-c000-i2c", "sifive,i2c0"
For Opencore based I2C IP block reimplemented in
- SiFive SoC. Supported compatible strings are:
- "sifive,fu540-c000-i2c" and "sifive,fu740-c000-i2c"
- Please refer to sifive-blocks-ip-versioning.txt
- for additional details.
+ FU740-C000 SoC.
+ Please refer to sifive-blocks-ip-versioning.txt for
+ additional details.
- reg : bus address start and address range size of device
- clocks : handle to the controller clock; see the note below.
Mutually exclusive with opencores,ip-clock-frequency
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
index 84e66913d042..5ac25275d8bf 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
@@ -25,15 +25,12 @@ description:
properties:
compatible:
items:
- - enum:
- - sifive,fu540-c000-pwm
- - sifive,fu740-c000-pwm
+ - const: sifive,fu540-c000-pwm
- const: sifive,pwm0
description:
Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
- compatible strings are "sifive,fu540-c000-pwm" and
- "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
- SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
+ compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0
+ as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
SiFive PWM v0 IP block with no chip integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details.
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index eb6843f69f7c..c6925e0b16e4 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -28,17 +28,11 @@ properties:
- items:
- enum:
- sifive,rocket0
- - sifive,bullet0
- sifive,e5
- - sifive,e7
- sifive,e51
- - sifive,e71
- sifive,u54-mc
- - sifive,u74-mc
- sifive,u54
- - sifive,u74
- sifive,u5
- - sifive,u7
- const: riscv
- const: riscv # Simulator only
description:
--
2.27.0
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