ACK/Cmnt: [PATCH 0/5][SRU][G] Tiger Lake PMC core driver fixes
stefan.bader at canonical.com
Fri Oct 30 07:53:45 UTC 2020
On 30.10.20 07:01, AceLan Kao wrote:
> BugLink: https://bugs.launchpad.net/bugs/1899883
> The power gating status is not correct and the slp_s0 value is not correct
> on Intel TigerLake platform.
> The patchset in
> provides several critical fixes for intel_pmc_core driver.
> Verified on some TigerLake platforms
> [Regression Potential]
> Low, the fix for status bits map and the slp_s0 calculation are simple
> and clear, should have low impact on regression.
> David E. Box (1):
> platform/x86: pmc_core: Use descriptive names for LPM registers
> Gaurav Singh (1):
> platform/x86: intel_pmc_core: fix bound check in
> Gayatri Kammela (2):
> platform/x86: intel_pmc_core: Fix TigerLake power gating status map
> platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> Sathyanarayana Nujella (1):
> platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
> drivers/platform/x86/intel_pmc_core.h | 5 +-
> 2 files changed, 49 insertions(+), 42 deletions(-)
First, I only looked at the 5 Groovy primary patches. The set for oem-5.6 is
just too big. And then just a note on the "Impact": Honestly, I cannot
understand how this actually impacts a user. Would I notice somehow? And what
makes the fixes critical? This probably is all very clear to you but I maybe can
gues that PMC means power management controller ... or so...
Acked-by: Stefan Bader <stefan.bader at canonical.com>
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