[SRU][F][G][PATCH 0/1] net/mlx5e: Fix endianness handling in pedit mask (LP: 1872726)

[frank.heimes at canonical.com]

Buglink: https://bugs.launchpad.net/bugs/1872726

SRU Justification:

[Impact]

* An issue with the endianess handling in the Mellanox mlx5 driver was found.

* The mask value is provided as 64 bit and has to be casted in either 32 or 16 bit.

* On big endian systems the wrong half was casted which resulted in an all zero mask.

[Fix]

* Backport: https://launchpadlibrarian.net/476243025/0001-net-mlx5-fix-endianness-handling-in-pedit-mask.patch

[Test Case]

* An s390x system with RoCE Express 2(.1) system is needed and the driver loaded.

* Check whether the mask value stays zero, or if it also get's non-zero values.

* Functional testing is currently only doable by IBM, since we only have RoCE (1) hardware that uses the mlx4 driver.

[Regression Potential] 

* There is regression potential is moderate, since:

* the RoCE 2(.1) cards are pretty new and not very wide spread, yet

* the fix got already upstream accepted with 5.6

* However, at the end the patch modifies Mellanox common code (drivers/net/ethernet/mellanox/mlx5/core/en_tc.c) to make the driver work correctly on s390x.

* but the changes were reviewed, signed off by Mellanox engineers and are very limited.

[Other Info]

* The above backport (patch-file) is based on commit 404402abd5f90aa90a134eb9604b1750c1941529 404402abd5f9 "net/mlx5e: Fix endianness handling in pedit mask" - the backport was needed for getting it applied to focal master-next.

* The commit itself got upstream accepted with kernel v5.6, hence should automatically land in 'gorilla', but since gorilla is still based on 5.4, I'm adding 'G' to this SRU.

Sebastian Hense (1):
  net/mlx5: fix endianness handling in pedit mask

 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

-- 
2.25.1