ACK/Cmnt: [SRU][E][PATCH v2 0/5] Add perf support for Comet Lake/Ice Lake CPU

[Stefan Bader]

On 27.11.19 09:02, You-Sheng Yang wrote:
> BugLink: https://bugs.launchpad.net/bugs/1848978
> 
> [Impact]
> There is no complete perf support for Comet Lake CPU. For Ice Lake, some
> changes has been included in v5.3, but still misses CPU IDs.
> 
> [Fix]
> perf support for Comet Lake is based on previous works for Ice Lake, so
> changes for both have to be backported.
> 
> [Test Case]
> On platforms with Comet Lake/Ice Lake CPUs, one should find new
> cstate_pkg events c{8,9,10}-residency appear in output of `perf list`
> for use.
> 
> [Regression Potential]
> Low. This backports perf support for previously incompletedly supported
> cpu models.
> 
> V2:
> - drop patch from commit 63b79f6ebc46 ("perf/x86: Support constraint
>   ranges") as it has already been included in v5.3.
> 
> Kan Liang (5):
>   perf/x86/intel: Add Comet Lake CPU support
>   perf/x86/msr: Add Comet Lake CPU support
>   perf/x86/cstate: Add Comet Lake CPU support
>   perf/x86/msr: Add new CPU model numbers for Ice Lake
>   perf/x86/cstate: Update C-state counters for Ice Lake
> 
>  arch/x86/events/intel/core.c   |  2 ++
>  arch/x86/events/intel/cstate.c | 42 ++++++++++++++++++++++++----------
>  arch/x86/events/msr.c          |  5 ++++
>  3 files changed, 37 insertions(+), 12 deletions(-)
> 
Nothing for the Eoan submission but I would think about following up with
feature additions to Disco. Is the limited lifetime worth all the effort?

Acked-by: Stefan Bader <stefan.bader at canonical.com>