[PATCH][SRU Artful] UBUNTU: SAUCE: ahci: thunderx2: stop engine fix update

Marcelo Henrique Cerri marcelo.cerri at canonical.com
Fri Oct 27 12:33:20 UTC 2017


Hi, Stefan.

The change is inside an #ifdef CONFIG_ARM64 section.

-- 
Regards,
Marcelo

On Fri, Oct 27, 2017 at 02:23:54PM +0200, Stefan Bader wrote:
> On 25.10.2017 00:09, dann frazier wrote:
> > BugLink: https://bugs.launchpad.net/bugs/1724117
> > 
> > The current reset fix fails during continuous reboot test. The failure
> > happens when both the on-board SATA slots are used and when one of the
> > controllers are reset.
> > 
> > The latest ThunderX2 firmware (3.1) enables hardware error interrupts and
> > when the reset fix fails, we get a hang with the print:
> > [   14.839308] sd 1:0:0:0: [sdb] 468862128 512-byte logical blocks: (240 GB/224 GiB)
> > [   14.846796] sd 1:0:0:0: [sdb] 4096-byte physical blocks
> > [   14.852036] sd 1:0:0:0: [sdb] Write Protect is off
> > [   14.856843] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
> > [   14.866022] ata2.00: Enabling discard_zeroes_data
> > 
> >         *** NBU BAR Error 0x1e25c ***
> >          AddrLo 0x1d80180 AddrHi 0x0
> > 
> > To fix this issue, update the SATA reset fix to increase the delays between register writes.
> > 
> > Signed-off-by: Jayachandran C <jnair at caviumnetworks.com>
> > [ dannf: *** There is no need to carry this forward beyond artful *** ]
> > Signed-off-by: dann frazier <dann.frazier at canonical.com>
> > ---
> >  drivers/ata/libahci.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
> > index 9116bba1b07d..1d3e614bad2b 100644
> > --- a/drivers/ata/libahci.c
> > +++ b/drivers/ata/libahci.c
> > @@ -679,10 +679,11 @@ int ahci_stop_engine(struct ata_port *ap)
> >  			MIDR_CPU_VAR_REV(0, 0),
> >  			MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) {
> >  		tmp = readl(hpriv->mmio + 0x8000);
> > +		udelay(100);
> >  		writel(tmp | (1 << 26), hpriv->mmio + 0x8000);
> > -		udelay(1);
> > +		udelay(100);
> >  		writel(tmp & ~(1 << 26), hpriv->mmio + 0x8000);
> > -		dev_warn(ap->host->dev, "CN99XX stop engine fix applied!\n");
> > +		dev_warn(ap->host->dev, "CN99XX SATA reset workaround applied\n");
> >  	}
> >  #endif
> >  
> > 
> The bug report claims that this should fix a certain chipset and only on arm.
> But I cannot see how this would be limited to anything specific...
> 




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