[PATCH] UBUNTU: SAUCE: PCI: Disable broken RTIT_BAR of Intel TH

[Seth Forshee]

Forgot to say in the subject, this is for artful only.

On Wed, Oct 11, 2017 at 12:11:07PM -0500, Seth Forshee wrote:
> From: Alexander Shishkin <alexander.shishkin at linux.intel.com>
> 
> BugLink: http://bugs.launchpad.net/bugs/1715833
> 
> On some intergrations of the Intel TH the reported size of RTIT_BAR
> doesn't match its actual size, which leads to overlaps with other
> devices' resources.
> 
> For this reason, we need to disable the RTIT_BAR on Denverton where
> it would overlap with XHCI MMIO space and effectively kill usb dead.
> 
> Signed-off-by: Alexander Shishkin <alexander.shishkin at linux.intel.com>
> Signed-off-by: Seth Forshee <seth.forshee at canonical.com>
> ---
>  drivers/pci/quirks.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 73bad58d587a..02b009426670 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4811,6 +4811,27 @@ static void quirk_intel_no_flr(struct pci_dev *dev)
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr);
>  
> +static void quirk_intel_th_rtit_bar(struct pci_dev *dev)
> +{
> +	struct resource *r = &dev->resource[4];
> +
> +	/*
> +	 * Hello, Denverton!
> +	 * Denverton reports 2k of RTIT_BAR (resource 4), which can't be
> +	 * right given the 16 threads. When Intel TH gets enabled, the
> +	 * actual resource overlaps the XHCI MMIO space and causes it
> +	 * to die.
> +	 * We're not really using RTIT_BAR at all at the moment, so it's
> +	 * a safe choice to disable this resource.
> +	 */
> +	if (r->end == r->start + 0x7ff) {
> +		r->flags = 0;
> +		r->start = 0;
> +		r->end   = 0;
> +	}
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x19e1, quirk_intel_th_rtit_bar);
> +
>  /*
>   * The hibmc card on a HiSilicon D05 board sits behind a non-compliant
>   * bridge. The bridge has the PCI_BRIDGE_CTL_VGA config bit fixed at 0
> -- 
> 2.14.1
>