ACK: [PATCH 2/2][Xenial SRU] UBUNTU: SAUCE: Redpine: uapsd configuration changes

[Stefan Bader]

On 28.07.2017 13:22, Amitkumar Karwar wrote:
> From: Pavani Muthyala <pavani.muthyala at redpinesignals.com>
> 
> BugLink: https://bugs.launchpad.net/bugs/1706991
> 
> This patch configures specific uapsd parameters. This setting
> gives better downlink WLAN throughput when radio is shared
> between WLAN and BT.
> 
> Signed-off-by: Pavani Muthyala <pavani.muthyala at redpinesignals.com>
> Signed-off-by: Amitkumar Karwar <amit.karwar at redpinesignals.com>
Acked-by: Stefan Bader <stefan.bader at canonical.com>

> ---
>  ubuntu/rsi/rsi_91x_mgmt.c | 8 +++++---
>  ubuntu/rsi/rsi_mgmt.h     | 2 ++
>  2 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/ubuntu/rsi/rsi_91x_mgmt.c b/ubuntu/rsi/rsi_91x_mgmt.c
> index 2cd37bd..9976054 100644
> --- a/ubuntu/rsi/rsi_91x_mgmt.c
> +++ b/ubuntu/rsi/rsi_91x_mgmt.c
> @@ -2114,13 +2114,15 @@ int rsi_send_ps_request(struct rsi_hw *adapter, bool enable)
>  		ps->ps_sleep.connected_sleep = DEEP_SLEEP;
>  
>  	ps->ps_listen_interval = cpu_to_le32(ps_info->listen_interval);
> -	ps->ps_dtim_interval_duration =
> -		cpu_to_le32(ps_info->dtim_interval_duration);
> +	ps->ps_dtim_interval_duration = RSI_DEFAULT_DTIM_INTERVAL;
>  
>  	if (ps->ps_listen_interval > ps->ps_dtim_interval_duration)
>  		ps->ps_listen_interval = 0;
>  
> -	ps->ps_num_dtim_intervals = cpu_to_le32(ps_info->num_dtims_per_sleep);
> +	ps->ps_uapsd_acs = (adapter->hw->uapsd_max_sp_len <<
> +			    IEEE80211_WMM_IE_STA_QOSINFO_SP_SHIFT) |
> +			    IEEE80211_WMM_IE_STA_QOSINFO_AC_MASK;
> +	ps->ps_uapsd_wakeup_period = RSI_UAPSD_WAKEUP_PERIOD;
>  
>  	skb_put(skb, frame_len);
>  
> diff --git a/ubuntu/rsi/rsi_mgmt.h b/ubuntu/rsi/rsi_mgmt.h
> index 8965f23..9caff1f 100644
> --- a/ubuntu/rsi/rsi_mgmt.h
> +++ b/ubuntu/rsi/rsi_mgmt.h
> @@ -117,6 +117,8 @@ enum rx_cmd_type {
>  #define LOWER_20_ENABLE                 (0x4 << 12)
>  #define FULL40M_ENABLE                  0x6
>  
> +#define RSI_UAPSD_WAKEUP_PERIOD         0x1e
> +#define RSI_DEFAULT_DTIM_INTERVAL       0x0
>  #define RSI_LMAC_CLOCK_80MHZ            0x1
>  #define RSI_ENABLE_40MHZ                (0x1 << 3)
>  #define ENABLE_SHORTGI_RATE		BIT(9)
> 


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