[PATCH] UBUNTU: SAUCE: powerpc64: Fix legacy cmpi mneomonic assumption

[Benjamin Collins]

(NOTE: this applies to cmp as well)

Power ISA calls for cmpi to have the format crf,L,rA,SIMM where SIMM
is the value to compare to rA and L is a value of 0 (32-bit) or 1 (64-bit)
denoting how to perform zero extension of the value in SIMM.

On 32-bit, L must always be 0, so cmpi always had an implied value of 0
for L when it was used with the crf,rA,SIMM variant.

However, this changed in GNU AS, since implying this could lead to unforseen
bugs on 64-bit builds (e.g. passing a long value would be 32-bit on ppc32 and
64-bit on ppc64). So on 64-bit, cmpi and cmp do not support the implied L=0
variant.

Not to mention there are cmpwi and cmpdi mnemonics that have explicit values
for L, being 0 and 1 respectively.

This patch converts the cmpi to an explicit cmpwi which gets rid of this
error on builds with newer binutils:

arch/powerpc/kernel/head_64.S:217: Error: operand out of range (3 is not between 0 and 1)

This was due to gas trying to use r3 as L, which can only be 0 or 1.

Signed-off-by: Ben Collins <ben at cyphre.com>
---
arch/powerpc/kernel/head_64.S | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 04c546e..1f7f908 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -214,9 +214,9 @@ booting_thread_hwid:
 */
_GLOBAL(book3e_start_thread)
	LOAD_REG_IMMEDIATE(r5, MSR_KERNEL)
-	cmpi	0, r3, 0
+	cmpwi	r3, 0
	beq	10f
-	cmpi	0, r3, 1
+	cmpwi	r3, 1
	beq	11f
	/* If the thread id is invalid, just exit. */
	b	13f
@@ -241,9 +241,9 @@ _GLOBAL(book3e_start_thread)
 * r3 = the thread physical id
 */
_GLOBAL(book3e_stop_thread)
-	cmpi	0, r3, 0
+	cmpwi	r3, 0
	beq	10f
-	cmpi	0, r3, 1
+	cmpwi	r3, 1
	beq	10f
	/* If the thread id is invalid, just exit. */
	b	13f
-- 
2.10.2


	
--
Ben Collins
VP of Engineering @ Cyphre
ben at cyphre.com | www.cyphre.com