[Trusty][PATCH][Append 1/2] mmc: sdhci: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

Luis Henriques luis.henriques at canonical.com
Wed Sep 16 09:30:40 UTC 2015


On Fri, Sep 11, 2015 at 10:25:48PM +0800, Adam Lee wrote:
> From: Vincent Wan <vincent.wan at amd.com>
> 
> BugLink: https://bugs.launchpad.net/bugs/1472843
> 
> SDHC controller in AMD chipsets require SDHC transfer mode
> register to be cleared for commands without data. The issue was
> uncovered during testing eMMC cards on KB/ML based platforms
> 
> Signed-off-by: Vincent Wan <vincent.wan at amd.com>
> Signed-off-by: Wan Zongshun <mcuos.com at gmail.com>
> Signed-off-by: Arindam Nath <arindam.nath at amd.com>
> Tested-by: Vikram B <vikram.b at amd.com>
> Tested-by: Raghavendra Swamy <raghavendra.swamy at amd.com>
> Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
> (back ported from commit 9b8ffea6efb0d0edcac265a1ca422188fc1b6dfb)
> Signed-off-by: Adam Lee <adam.lee at canonical.com>
> 
> Conflicts:
> 	drivers/mmc/host/sdhci.c
> 	include/linux/mmc/sdhci.h
> ---
>  drivers/mmc/host/sdhci.c  | 6 +++++-
>  include/linux/mmc/sdhci.h | 2 ++
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index dbc064b..845e643 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -898,7 +898,11 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
>  	u16 mode;
>  	struct mmc_data *data = cmd->data;
>  
> -	if (data == NULL)
> +	if (data == NULL) {
> +		if (host->quirks2 &
> +			SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
> +			sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
> +		}

This patch doesn't compile due to a missing '}' here!!!

A slightly modified version of this patch (see below) has been applied to
trusty master-next branch.

Cheers,
--
Luís

>From 74ad66708b6d76837e03a3bd8d2a319724817507 Mon Sep 17 00:00:00 2001
From: Vincent Wan <vincent.wan at amd.com>
Date: Wed, 5 Nov 2014 14:09:00 +0800
Subject: [PATCH] mmc: sdhci: Add a quirk for AMD SDHC transfer mode register
 need to be cleared for cmd without data

BugLink: https://bugs.launchpad.net/bugs/1472843

SDHC controller in AMD chipsets require SDHC transfer mode
register to be cleared for commands without data. The issue was
uncovered during testing eMMC cards on KB/ML based platforms

Signed-off-by: Vincent Wan <vincent.wan at amd.com>
Signed-off-by: Wan Zongshun <mcuos.com at gmail.com>
Signed-off-by: Arindam Nath <arindam.nath at amd.com>
Tested-by: Vikram B <vikram.b at amd.com>
Tested-by: Raghavendra Swamy <raghavendra.swamy at amd.com>
Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
(back ported from commit 9b8ffea6efb0d0edcac265a1ca422188fc1b6dfb)
Signed-off-by: Adam Lee <adam.lee at canonical.com>

Conflicts:
	drivers/mmc/host/sdhci.c
	include/linux/mmc/sdhci.h
Acked-by: Tim Gardner <tim.gardner at canonical.com>
Acked-by: Brad Figg <brad.figg at canonical.com>
Signed-off-by: Brad Figg <brad.figg at canonical.com>
[ luis: added missing '}' that was causing a build failure ]
Signed-off-by: Luis Henriques <luis.henriques at canonical.com>
---
 drivers/mmc/host/sdhci.c  | 7 ++++++-
 include/linux/mmc/sdhci.h | 2 ++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index dbc064bc1fb2..73c6d5f49f49 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -898,8 +898,13 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
 	u16 mode;
 	struct mmc_data *data = cmd->data;
 
-	if (data == NULL)
+	if (data == NULL) {
+		if (host->quirks2 &
+			SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
+			sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+		}
 		return;
+	}
 
 	WARN_ON(!host->data);
 
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 362927c48f97..4d828e1c7399 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -100,6 +100,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_HOST_CONTROL		(1<<5)
 /* Controller does not support HS200 */
 #define SDHCI_QUIRK2_BROKEN_HS200			(1<<6)
+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
 
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */




More information about the kernel-team mailing list