[PATCH 3.13.y-ckt 128/143] ath5k: fix spontaneus AR5312 freezes

Kamal Mostafa kamal at canonical.com
Tue Mar 31 19:48:13 UTC 2015

3.13.11-ckt18 -stable review patch.  If anyone has any objections, please let me know.


From: Sergey Ryazanov <ryazanov.s.a at gmail.com>

commit 8bfae4f9938b6c1f033a5159febe97e441d6d526 upstream.

Sometimes while CPU have some load and ath5k doing the wireless
interface reset the whole WiSoC completely freezes. Set of tests shows
that using atomic delay function while we wait interface reset helps to
avoid such freezes.

The easiest way to reproduce this issue: create a station interface,
start continous scan with wpa_supplicant and load CPU by something. Or
just create multiple station interfaces and put them all in continous

This patch partially reverts the commit 1846ac3dbec0 ("ath5k: Use
usleep_range where possible"), which replaces initial udelay()
by usleep_range().

I do not know actual source of this issue, but all looks like that HW
freeze is caused by transaction on internal SoC bus, while wireless
block is in reset state.

Also I should note that I do not know how many chips are affected, but I
did not see this issue with chips, other than AR5312.

CC: Jiri Slaby <jirislaby at gmail.com>
CC: Nick Kossifidis <mickflemm at gmail.com>
CC: Luis R. Rodriguez <mcgrof at do-not-panic.com>
Fixes: 1846ac3dbec0 ("ath5k: Use usleep_range where possible")
Reported-by: Christophe Prevotaux <c.prevotaux at rural-networks.com>
Tested-by: Christophe Prevotaux <c.prevotaux at rural-networks.com>
Tested-by: Eric Bree <ebree at nltinc.com>
Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
Signed-off-by: Kalle Valo <kvalo at codeaurora.org>
Signed-off-by: Kamal Mostafa <kamal at canonical.com>
 drivers/net/wireless/ath/ath5k/reset.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index a3399c4..b9b651e 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -478,7 +478,7 @@ ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
 	regval = ioread32(reg);
 	iowrite32(regval | val, reg);
 	regval = ioread32(reg);
-	usleep_range(100, 150);
+	udelay(100);	/* NB: should be atomic */
 	/* Bring BB/MAC out of reset */
 	iowrite32(regval & ~val, reg);

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