APPLIED: [PATCH] UBUNTU: SAUCE: i915_bdw: drm/i915/bdw: enable eDRAM.
Brad Figg
brad.figg at canonical.com
Tue Mar 24 16:32:48 UTC 2015
On Tue, Mar 24, 2015 at 11:38:50AM +0200, Timo Aaltonen wrote:
> From: Ben Widawsky <benjamin.widawsky at intel.com>
>
> BugLink: http://bugs.launchpad.net/bugs/1430855
>
> The same register exists for querying and programming eDRAM AKA eLLC. So
> we can simply use it. For now, use all the same defaults as we had
> for Haswell, since like Haswell, I have no further details.
>
> I do not actually have a part with eDRAM, so I cannot test this.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> Reviewed-by: Brad Volkin <bradley.d.volkin at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> (backport from commit 1d2866baf71e222308345ec745c20cbdb279f325)
> Signed-off-by: Timo Aaltonen <timo.aaltonen at canonical.com>
> ---
> ubuntu/i915/intel_uncore.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/ubuntu/i915/intel_uncore.c b/ubuntu/i915/intel_uncore.c
> index d0c7577..aaf11fb 100644
> --- a/ubuntu/i915/intel_uncore.c
> +++ b/ubuntu/i915/intel_uncore.c
> @@ -374,7 +374,7 @@ void intel_uncore_early_sanitize(struct drm_device *dev)
> if (HAS_FPGA_DBG_UNCLAIMED(dev))
> __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
>
> - if (IS_HASWELL(dev) &&
> + if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) == 1)) {
> /* The docs do not explain exactly how the calculation can be
> * made. It is somewhat guessable, but for now, it's always
> --
> 2.1.4
>
>
> --
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Applied to Trusty master-next
--
Brad Figg brad.figg at canonical.com http://www.canonical.com
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