[3.16.y-ckt stable] Patch "ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled" has been added to staging queue

[Luis Henriques]

This is a note to let you know that I have just added a patch titled

    ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled

to the linux-3.16.y-queue branch of the 3.16.y-ckt extended stable tree 
which can be found at:

 http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.16.y-queue

This patch is scheduled to be released in version 3.16.7-ckt6.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.16.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Luis

------

>From e296264513a60fcda535bdce19452f9c57a03ed7 Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
Date: Wed, 28 Jan 2015 12:55:45 +0100
Subject: ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O
 coherency is disabled

commit dcad68876c21bac709b01eda24e39d4410dc36a8 upstream.

Since commit f2c3c67f00 (merge commit that adds commit "ARM: mvebu:
completely disable hardware I/O coherency"), we disable I/O coherency
on Armada EBU platforms.

However, we continue to initialize the coherency fabric, because this
coherency fabric is needed on Armada XP for inter-CPU
coherency. Unfortunately, due to this, we also continued to execute
the coherency fabric initialization code for Armada 375/38x, which
switched the PL310 into I/O coherent mode. This has the effect of
disabling the outer cache sync operation: this is needed when I/O
coherency is enabled to work around a PCIe/L2 deadlock. But obviously,
when I/O coherency is disabled, having the outer cache sync operation
is crucial.

Therefore, this commit fixes the armada_375_380_coherency_init() so
that the PL310 is switched to I/O coherent mode only if I/O coherency
is enabled.

Without this fix, all devices using DMA are broken on Armada 375/38x.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement at free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement at free-electrons.com>
Signed-off-by: Andrew Lunn <andrew at lunn.ch>
Signed-off-by: Luis Henriques <luis.henriques at canonical.com>
---
 arch/arm/mach-mvebu/coherency.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 1163a3e9accd..2ffccd4eb084 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -342,6 +342,13 @@ static void __init armada_375_380_coherency_init(struct device_node *np)
 	arch_ioremap_caller = armada_pcie_wa_ioremap_caller;

 	/*
+	 * We should switch the PL310 to I/O coherency mode only if
+	 * I/O coherency is actually enabled.
+	 */
+	if (!coherency_available())
+		return;
+
+	/*
 	 * Add the PL310 property "arm,io-coherent". This makes sure the
 	 * outer sync operation is not used, which allows to
 	 * workaround the system erratum that causes deadlocks when
--
2.1.4