[3.19.y-ckt stable] Patch "clk: qcom: Use parent rate when set rate to pixel RCG clock" has been added to staging queue

Kamal Mostafa kamal at canonical.com
Wed Aug 5 21:47:25 UTC 2015


This is a note to let you know that I have just added a patch titled

    clk: qcom: Use parent rate when set rate to pixel RCG clock

to the linux-3.19.y-queue branch of the 3.19.y-ckt extended stable tree 
which can be found at:

    http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.19.y-queue

This patch is scheduled to be released in version 3.19.8-ckt5.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.19.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

------

>From 434bef6552e45f14a57c06b965140c59a2674443 Mon Sep 17 00:00:00 2001
From: Hai Li <hali at codeaurora.org>
Date: Thu, 25 Jun 2015 18:35:33 -0400
Subject: clk: qcom: Use parent rate when set rate to pixel RCG clock

commit 6d451367bfa16fc103604bacd258f534c65d1540 upstream.

Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.

Signed-off-by: Hai Li <hali at codeaurora.org>
Tested-by: Archit Taneja <architt at codeaurora.org>
Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks")
[sboyd at codeaurora.org: Silenced unused parent variable warning]
Signed-off-by: Stephen Boyd <sboyd at codeaurora.org>
[ kamal: backport to 3.19-stable: context ]
Signed-off-by: Kamal Mostafa <kamal at canonical.com>
---
 drivers/clk/qcom/clk-rcg2.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 4fe9c01..05b7bbc 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -508,18 +508,16 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
 	struct freq_tbl f = *rcg->freq_tbl;
 	const struct frac_entry *frac = frac_table_pixel;
-	unsigned long request, src_rate;
+	unsigned long request;
 	int delta = 100000;
 	u32 mask = BIT(rcg->hid_width) - 1;
 	u32 hid_div;
-	struct clk *parent = clk_get_parent_by_index(hw->clk, f.src);

 	for (; frac->num; frac++) {
 		request = (rate * frac->den) / frac->num;

-		src_rate = __clk_round_rate(parent, request);
-		if ((src_rate < (request - delta)) ||
-			(src_rate > (request + delta)))
+		if ((parent_rate < (request - delta)) ||
+			(parent_rate > (request + delta)))
 			continue;

 		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG,
--
1.9.1





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