[3.13.y.z extended stable] Patch "ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU" has been added to staging queue
Kamal Mostafa
kamal at canonical.com
Tue Sep 30 21:29:44 UTC 2014
This is a note to let you know that I have just added a patch titled
ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU
to the linux-3.13.y-queue branch of the 3.13.y.z extended stable tree
which can be found at:
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.13.y-queue
This patch is scheduled to be released in version 3.13.11.8.
If you, or anyone else, feels it should not be added to this tree, please
reply to this email.
For more information about the 3.13.y.z tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable
Thanks.
-Kamal
------
>From 5abcd91eefe9145548bfabc07aa65d021e001325 Mon Sep 17 00:00:00 2001
From: Pranavkumar Sawargaonkar <pranavkumar at linaro.org>
Date: Thu, 31 Jul 2014 12:23:23 +0530
Subject: ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU
commit f6edbbf36da3a27b298b66c7955fc84e1dcca305 upstream.
X-Gene u-boot runs in EL2 mode with MMU enabled hence we might
have stale EL2 tlb enteris when we enable EL2 MMU on each host CPU.
This can happen on any ARM/ARM64 board running bootloader in
Hyp-mode (or EL2-mode) with MMU enabled.
This patch ensures that we flush all Hyp-mode (or EL2-mode) TLBs
on each host CPU before enabling Hyp-mode (or EL2-mode) MMU.
Tested-by: Mark Rutland <mark.rutland at arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier at arm.com>
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar at linaro.org>
Signed-off-by: Anup Patel <anup.patel at linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall at linaro.org>
Signed-off-by: Kamal Mostafa <kamal at canonical.com>
---
arch/arm/kvm/init.S | 4 ++++
arch/arm64/kvm/hyp-init.S | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 1b9844d..ee4f744 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -98,6 +98,10 @@ __do_hyp_init:
mrc p15, 0, r0, c10, c2, 1
mcr p15, 4, r0, c10, c2, 1
+ @ Invalidate the stale TLBs from Bootloader
+ mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
+ dsb ish
+
@ Set the HSCTLR to:
@ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
@ - Endianness: Kernel config
diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S
index 2b0244d..12e26f3 100644
--- a/arch/arm64/kvm/hyp-init.S
+++ b/arch/arm64/kvm/hyp-init.S
@@ -74,6 +74,10 @@ __do_hyp_init:
msr mair_el2, x4
isb
+ /* Invalidate the stale TLBs from Bootloader */
+ tlbi alle2
+ dsb sy
+
mrs x4, sctlr_el2
and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
ldr x5, =SCTLR_EL2_FLAGS
--
1.9.1
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