[PATCH 3.11 131/131] PCI: mvebu: Use Device ID and revision from underlying endpoint

TB Boxer boxerspam1 at outlook.com
Fri Mar 7 02:07:31 UTC 2014


When do you need this? On March 6, 2014 at 6:17:57 PM CST, TB Boxer <boxerspam1 at outlook.com> wrote:I just checked this off my to-do list. On March 5, 2014 at 8:24:15 AM CST, Luis Henriques <luis.henriques at canonical.com> wrote:3.11.10.6 -stable review patch. If anyone has any objections, please let me know.------------------From: Andrew Lunn commit 322a8e91844f4ae2093e0d3d8a318d0ef2596756 upstream.Marvell SoCs place the SoC number into the PCIe endpoint device ID. TheSoC stepping is placed into the PCIe revision. The old plat-orion PCIedriver allowed this information to be seen in user space with a simplelspci command.The new driver places a virtual PCI-PCI bridge on top of these endpoints.It has its own hard coded PCI device ID. Thus it is no longer possible tosee what the SoC is using lspci.When initializing the PCI-PCI bridge, set its device ID and revision fromthe underlying endpoint, thus restoring this functionality. Debian wouldlike to use this in order to aid installing the correct DTB file.Fixes: 45361a4fe4464 ("pci: PCIe driver for Marvell Armada 370/XP systems")Signed-off-by: Andrew Lunn Signed-off-by: Bjorn Helgaas Acked-by: Thomas Petazzoni Acked-by: Jason Cooper [ luis: backported to 3.11: replaced mvebu_readl() by readl() ]Signed-off-by: Luis Henriques --- drivers/pci/host/pci-mvebu.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-)diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.cindex 7bf3926..86d3fa4 100644--- a/drivers/pci/host/pci-mvebu.c+++ b/drivers/pci/host/pci-mvebu.c@@ -56,14 +56,6 @@ #define PCIE_DEBUG_CTRL 0x1a60 #define PCIE_DEBUG_SOFT_RESET BIT(20) -/*- * This product ID is registered by Marvell, and used when the Marvell- * SoC is not the root complex, but an endpoint on the PCIe bus. It is- * therefore safe to re-use this PCI ID for our emulated PCI-to-PCI- * bridge.- */-#define MARVELL_EMULATED_PCI_PCI_BRIDGE_ID 0x7846- /* PCI configuration space of a PCI-to-PCI bridge */ struct mvebu_sw_pci_bridge { u16 vendor;@@ -356,7 +348,8 @@ static void mvebu_sw_pci_bridge_init(struct mvebu_pcie_port *port)  bridge->class = PCI_CLASS_BRIDGE_PCI; bridge->vendor = PCI_VENDOR_ID_MARVELL;- bridge->device = MARVELL_EMULATED_PCI_PCI_BRIDGE_ID;+ bridge->device = readl(port->base + PCIE_DEV_ID_OFF) >> 16;+ bridge->revision = readl(port->base + PCIE_DEV_REV_OFF) & 0xff; bridge->header_type = PCI_HEADER_TYPE_BRIDGE; bridge->cache_line_size = 0x10; -- 1.9.0--To unsubscribe from this list: send the line "unsubscribe linux-kernel" inthe body of a message to majordomo at vger.kernel.orgMore majordomo info at http://vger.kernel.org/majordomo-info.htmlPlease read the FAQ at http://www.tux.org/lkml/          
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