[3.11.y.z extended stable] Patch "ARM: 8064/1: fix v7-M signal return" has been added to staging queue
Luis Henriques
luis.henriques at canonical.com
Fri Jun 6 15:04:43 UTC 2014
This is a note to let you know that I have just added a patch titled
ARM: 8064/1: fix v7-M signal return
to the linux-3.11.y-queue branch of the 3.11.y.z extended stable tree
which can be found at:
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.11.y-queue
If you, or anyone else, feels it should not be added to this tree, please
reply to this email.
For more information about the 3.11.y.z tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable
Thanks.
-Luis
------
>From 15650f271ccfe77957b5c7d93d0cd69ce868f11c Mon Sep 17 00:00:00 2001
From: Rabin Vincent <rabin at rab.in>
Date: Sat, 24 May 2014 17:38:01 +0100
Subject: ARM: 8064/1: fix v7-M signal return
MIME-Version: 1.0
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commit 483a6c9d447f625b991fa04a1530493d893984db upstream.
According to the ARM ARM, the behaviour is UNPREDICTABLE if the PC read
from the exception return stack is not half word aligned. See the
pseudo code for ExceptionReturn() and PopStack().
The signal handler's address has the bit 0 set, and setup_return()
directly writes this to regs->ARM_pc. Current hardware happens to
discard this bit, but QEMU's emulation doesn't and this makes processes
crash. Mask out bit 0 before the exception return in order to get
predictable behaviour.
Fixes: 19c4d593f0b4 ("ARM: ARMv7-M: Add support for exception handling")
Acked-by: Uwe Kleine-König <u.kleine-koenig at pengutronix.de>
Signed-off-by: Rabin Vincent <rabin at rab.in>
Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
Signed-off-by: Luis Henriques <luis.henriques at canonical.com>
---
arch/arm/kernel/entry-header.S | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index de23a9beed13..b527a79f73f1 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -132,6 +132,10 @@
orrne r5, V7M_xPSR_FRAMEPTRALIGN
biceq r5, V7M_xPSR_FRAMEPTRALIGN
+ @ ensure bit 0 is cleared in the PC, otherwise behaviour is
+ @ unpredictable
+ bic r4, #1
+
@ write basic exception frame
stmdb r2!, {r1, r3-r5}
ldmia sp, {r1, r3-r5}
--
1.9.1
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