[PATCH 086/222] drm/radeon/dce32+: use fractional fb dividers for high clocks
Herton Ronaldo Krzesinski
herton.krzesinski at canonical.com
Wed Jan 16 15:54:46 UTC 2013
3.5.7.3 -stable review patch. If anyone has any objections, please let me know.
------------------
From: Alex Deucher <alexander.deucher at amd.com>
commit a02dc74b317d78298cb0587b9b1f6f741fd5c139 upstream.
Fixes flickering with some high res montiors.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
[ herton: on 3.5, set pll->flags instead of radeon_crtc->pll_flags ]
Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski at canonical.com>
---
drivers/gpu/drm/radeon/atombios_crtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 25b8014..80eb8d5 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -577,6 +577,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
/* use frac fb div on APUs */
if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev))
pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
+ if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
+ pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
} else {
pll->flags |= RADEON_PLL_LEGACY;
--
1.7.9.5
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