[ 3.5.y.z extended stable ] Patch "ARM: 7628/1: head.S: map one extra section for the ATAG/DTB" has been added to staging queue
Herton Ronaldo Krzesinski
herton.krzesinski at canonical.com
Tue Feb 5 22:00:02 UTC 2013
This is a note to let you know that I have just added a patch titled
ARM: 7628/1: head.S: map one extra section for the ATAG/DTB
to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree
which can be found at:
If you, or anyone else, feels it should not be added to this tree, please
reply to this email.
For more information about the 3.5.y.z tree, see
>From 7f239be7567325f2d14fed77cd70c68e43d473bc Mon Sep 17 00:00:00 2001
From: Nicolas Pitre <nicolas.pitre at linaro.org>
Date: Tue, 15 Jan 2013 18:51:32 +0100
Subject: [PATCH] ARM: 7628/1: head.S: map one extra section for the ATAG/DTB
commit 6f16f4998f98e42e3f2dedf663cfb691ff0324af upstream.
We currently use a temporary 1MB section aligned to a 1MB boundary for
mapping the provided device tree until the final page table is created.
However, if the device tree happens to cross that 1MB boundary, the end
of it remains unmapped and the kernel crashes when it attempts to access
it. Given no restriction on the location of that DTB, it could end up
with only a few bytes mapped at the end of a section.
Solve this issue by mapping two consecutive sections.
Signed-off-by: Nicolas Pitre <nico at linaro.org>
Tested-by: Sascha Hauer <s.hauer at pengutronix.de>
Tested-by: Tomasz Figa <t.figa at samsung.com>
Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
[bwh: Backported to 3.2:
- Adjust context
- The mapping is not conditional; drop the 'ne' suffixes]
Signed-off-by: Ben Hutchings <ben at decadent.org.uk>
[ herton: same backport applies to 3.5, with context adjusted on comment ]
Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski at canonical.com>
arch/arm/kernel/head.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 835898e..458b8d3 100644
@@ -254,6 +254,7 @@ __create_page_tables:
* Then map boot params address in r2 or the first 1MB (2MB with LPAE)
* of ram if boot params address is not specified.
+ * We map 2 sections in case the ATAGs/DTB crosses a section boundary.
mov r0, r2, lsr #SECTION_SHIFT
movs r0, r0, lsl #SECTION_SHIFT
@@ -262,6 +263,8 @@ __create_page_tables:
add r3, r3, #PAGE_OFFSET
add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
orr r6, r7, r0
+ str r6, [r3], #1 << PMD_ORDER
+ add r6, r6, #1 << SECTION_SHIFT
str r6, [r3]
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