[ 3.8.y.z extended stable ] Patch "drm/nouveau: fix semaphore dmabuf obj" has been added to staging queue

[Kamal Mostafa]

This is a note to let you know that I have just added a patch titled

    drm/nouveau: fix semaphore dmabuf obj

to the linux-3.8.y-queue branch of the 3.8.y.z extended stable tree 
which can be found at:

 http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.8.y-queue

This patch is scheduled to be released in version 3.8.13.7.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.8.y.z tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

------

>From dfe634b9bb39174b27a6475bb1371a6313ade9f2 Mon Sep 17 00:00:00 2001
From: Maarten Lankhorst <maarten.lankhorst at canonical.com>
Date: Tue, 23 Jul 2013 15:49:39 +0200
Subject: drm/nouveau: fix semaphore dmabuf obj

Fixes some dmabuf object errors on nv50 chipset and below.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
[ kamal: backport to 3.8 ]
Signed-off-by: Kamal Mostafa <kamal at canonical.com>
---
 drivers/gpu/drm/nouveau/nv10_fence.c |  2 +-
 drivers/gpu/drm/nouveau/nv50_fence.c | 14 +++++++++-----
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index 03017f2..4f1d5d3 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -132,7 +132,7 @@ nv10_fence_context_new(struct nouveau_channel *chan)
 		struct ttm_mem_reg *mem = &priv->bo->bo.mem;
 		struct nouveau_object *object;
 		u32 start = mem->start * PAGE_SIZE;
-		u32 limit = mem->start + mem->size - 1;
+		u32 limit = start + mem->size - 1;

 		ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
 					 NvSema, 0x0002,
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index d889f3a..923c7ef 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -50,6 +50,8 @@ nv50_fence_context_new(struct nouveau_channel *chan)
 	struct nv50_fence_chan *fctx;
 	struct ttm_mem_reg *mem = &priv->bo->bo.mem;
 	struct nouveau_object *object;
+	u32 start = mem->start * PAGE_SIZE;
+	u32 limit = start + mem->size - 1;
 	int ret, i;

 	fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
@@ -59,26 +61,28 @@ nv50_fence_context_new(struct nouveau_channel *chan)
 	nouveau_fence_context_new(&fctx->base);

 	ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
-				 NvSema, 0x0002,
+				 NvSema, 0x003d,
 				 &(struct nv_dma_class) {
 					.flags = NV_DMA_TARGET_VRAM |
 						 NV_DMA_ACCESS_RDWR,
-					.start = mem->start * PAGE_SIZE,
-					.limit = mem->size - 1,
+					.start = start,
+					.limit = limit,
 				 }, sizeof(struct nv_dma_class),
 				 &object);

 	/* dma objects for display sync channel semaphore blocks */
 	for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) {
 		struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
+		u32 start = bo->bo.mem.start * PAGE_SIZE;
+		u32 limit = start + bo->bo.mem.size - 1;

 		ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
 					 NvEvoSema0 + i, 0x003d,
 					 &(struct nv_dma_class) {
 						.flags = NV_DMA_TARGET_VRAM |
 							 NV_DMA_ACCESS_RDWR,
-						.start = bo->bo.offset,
-						.limit = bo->bo.offset + 0xfff,
+						.start = start,
+						.limit = limit,
 					 }, sizeof(struct nv_dma_class),
 					 &object);
 	}
--
1.8.1.2