[PATCH 058/102] sky2: Receive Overflows not counted

Luis Henriques luis.henriques at canonical.com
Mon Apr 8 09:50:13 UTC 2013 -stable review patch.  If anyone has any objections, please let me know.


From: Mirko Lindner <mlindner at marvell.com>

commit 9cfe8b156c21cf340b3a10ecb3022fbbc1c39185 upstream.

The sky2 driver doesn't count the Receive Overflows because the MAC
interrupt for this event is not set in the MAC's interrupt mask.
The MAC's interrupt mask is set only for Transmit FIFO Underruns.

Fix: The correct setting should be (GM_IS_TX_FF_UR | GM_IS_RX_FF_OR)
Otherwise the Receive Overflow event will not generate any interrupt.
The  Receive Overflow interrupt is handled correctly

Signed-off-by: Mirko Lindner <mlindner at marvell.com>
Acked-by: Stephen Hemminger <stephen at networkplumber.org>
Signed-off-by: David S. Miller <davem at davemloft.net>
Signed-off-by: Luis Henriques <luis.henriques at canonical.com>
 drivers/net/ethernet/marvell/sky2.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/marvell/sky2.h b/drivers/net/ethernet/marvell/sky2.h
index 3c896ce..a0f229e 100644
--- a/drivers/net/ethernet/marvell/sky2.h
+++ b/drivers/net/ethernet/marvell/sky2.h
@@ -2069,7 +2069,7 @@ enum {
 	GM_IS_RX_FF_OR	= 1<<1,	/* Receive FIFO Overrun */
 	GM_IS_RX_COMPL	= 1<<0,	/* Frame Reception Complete */
-#define GMAC_DEF_MSK     GM_IS_TX_FF_UR
 /*	GMAC_LINK_CTRL	16 bit	GMAC Link Control Reg (YUKON only) */

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