[Ack][PATCH oneiric] drm/i915: enable ring freq scaling, RC6 and graphics turbo on Ivy Bridge v3

Chris Van Hoof vanhoof at canonical.com
Thu Nov 10 15:04:36 UTC 2011


On 11/08/2011 05:12 PM, Herton Ronaldo Krzesinski wrote:
> On Tue, Nov 08, 2011 at 01:41:46PM -0800, Leann Ogasawara wrote:
>> On Tue, 2011-11-08 at 15:46 -0500, Robert Hooker wrote:
>>> From: Jesse Barnes <jbarnes at virtuousgeek.org>
>>>
>>> They use the same register interfaces, so we can simply enable the
>>> existing code on IVB.
>>>
>>> v2:
>>>   - resolve conflict with ring freq scaling, we can enable it too
>>> v3:
>>>   - resolve conflict again, this time on drm-intel-next
>>>
>>> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
>>> Signed-off-by: Keith Packard <keithp at keithp.com>
>>>
>>> Upstream commit 1c70c0cebd1295a42fec75045b8a6b4419cedef3
>>
>> Even though this is not a clean cherry-pick from upstream it's pretty
>> straightforward and no risk of regression.  It also appears to have been
>> tested on IvyBridge.  I'm not sure if you'll need to create a dummy LP
>> bug just for SRU tracking purposes.  I'll leave that to the stable
>> maintenance team to sort out. 
> 
> Yes, please create a bug before applying, with SRU justification in the
> description, since this will need to be verified (appear in the
> sru-report page).

BugLink: https://bugs.launchpad.net/bugs/888154

>>
>>> Backported to 3.0.x, ring freq scaling isn't available
>>> there.
>>>
>>> Signed-off-by: Robert Hooker <robert.hooker at canonical.com>
>>
>> Acked-by: Leann Ogasawara <leann.ogasawara at canonical.com>
>>
>>> ---
>>>  drivers/gpu/drm/i915/i915_debugfs.c  |    2 +-
>>>  drivers/gpu/drm/i915/intel_display.c |    4 ++--
>>>  2 files changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>>> index 0a893f7..e36efdc 100644
>>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>>> @@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
>>>  			   MEMSTAT_VID_SHIFT);
>>>  		seq_printf(m, "Current P-state: %d\n",
>>>  			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
>>> -	} else if (IS_GEN6(dev)) {
>>> +	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
>>>  		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
>>>  		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
>>>  		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> index e917c7b..2a7a64c 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -7941,7 +7941,7 @@ void intel_modeset_init(struct drm_device *dev)
>>>  		intel_init_emon(dev);
>>>  	}
>>>  
>>> -	if (IS_GEN6(dev))
>>> +	if (IS_GEN6(dev) || IS_GEN7(dev))
>>>  		gen6_enable_rps(dev_priv);
>>>  
>>>  	INIT_WORK(&dev_priv->idle_work, intel_idle_update);
>>> @@ -7983,7 +7983,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
>>>  
>>>  	if (IS_IRONLAKE_M(dev))
>>>  		ironlake_disable_drps(dev);
>>> -	if (IS_GEN6(dev))
>>> +	if (IS_GEN6(dev) || IS_GEN7(dev))
>>>  		gen6_disable_rps(dev);
>>>  
>>>  	if (IS_IRONLAKE_M(dev))
>>> -- 
>>> 1.7.0.4
>>>
>>>
>>
>>
>>
>> -- 
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> 




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