ACK: [Natty] UBUNTU: SAUCE: ata_piix: make DVD Drive recognisable on systems with Intel Sandybridge chipsets(v2)
Tim Gardner
tcanonical at tpi.com
Mon Nov 14 21:44:34 UTC 2011
On 11/13/2011 09:14 PM, ming.lei at canonical.com wrote:
> From: Ming Lei<ming.lei at canonical.com>
>
> This quirk patch fixes one kind of bug inside some Intel Sandybridge
> chipsets, see reports from
>
> https://bugzilla.kernel.org/show_bug.cgi?id=40592.
>
> Many guys also have reported the problem before:
>
> https://bugs.launchpad.net/bugs/737388
> https://bugs.launchpad.net/bugs/794642
> https://bugs.launchpad.net/bugs/782389
> ......
>
> With help from Tejun, the problem is found to be caused by 32bit PIO
> mode, so introduce the quirk patch to disable 32bit PIO on SATA piix
> for some Sandybridge CPT chipsets.
>
> Seth also tested the patch on all five affected chipsets
> (pci device ID: 0x1c00, 0x1c01, 0x1d00, 0x1e00, 0x1e01), and found
> the patch does fix the problem.
>
> Tejun Heo<htejun at gmail.com> also acked the patch, and Jeff Garzik
> is queuing the patch to linus tree or -next tree.
> SRU Justification:
>
> Impact:
> - without the patch, DVD drive can't be recognized on Dell
> optiplex 390.
> Fix:
> - After applying the patch, DVD drive can be recognized well
> on Dell optiplex 390.
>
> BugLink: https://bugs.launchpad.net/bugs/737388
> BugLink: https://bugs.launchpad.net/bugs/794642
> BugLink: https://bugs.launchpad.net/bugs/782389
>
> Upstream: [1],[2],[3]
> Upstream: commit 5e5a4f5d5a08c9c504fe956391ac3dae2c66556d
>
> [1], https://bugzilla.kernel.org/show_bug.cgi?id=40592
> [2], http://marc.info/?t=131665670300001&r=1&w=2
> [3], http://marc.info/?t=131743346400002&r=1&w=2
>
> Signed-off-by: Ming Lei<ming.lei at canonical.com>
> ---
> drivers/ata/ata_piix.c | 33 ++++++++++++++++++++++++++++++---
> 1 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
> index 6cb14ca..7563512 100644
> --- a/drivers/ata/ata_piix.c
> +++ b/drivers/ata/ata_piix.c
> @@ -113,6 +113,8 @@ enum {
> PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS,
> PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR,
>
> + PIIX_FLAG_PIO16 = (1<< 30), /*support 16bit PIO only*/
> +
> PIIX_80C_PRI = (1<< 5) | (1<< 4),
> PIIX_80C_SEC = (1<< 7) | (1<< 6),
>
> @@ -147,6 +149,7 @@ enum piix_controller_ids {
> ich8m_apple_sata, /* locks up on second port enable */
> tolapai_sata,
> piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
> + ich8_sata_snb,
> };
>
> struct piix_map_db {
> @@ -177,6 +180,7 @@ static int piix_sidpr_scr_write(struct ata_link *link,
> static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
> unsigned hints);
> static bool piix_irq_check(struct ata_port *ap);
> +static int piix_port_start(struct ata_port *ap);
> #ifdef CONFIG_PM
> static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
> static int piix_pci_device_resume(struct pci_dev *pdev);
> @@ -298,15 +302,15 @@ static const struct pci_device_id piix_pci_tbl[] = {
> /* SATA Controller IDE (PCH) */
> { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> /* SATA Controller IDE (CPT) */
> - { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> + { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
> /* SATA Controller IDE (CPT) */
> - { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> + { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
> /* SATA Controller IDE (CPT) */
> { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
> /* SATA Controller IDE (CPT) */
> { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
> /* SATA Controller IDE (PBG) */
> - { 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> + { 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
> /* SATA Controller IDE (PBG) */
> { 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
> { } /* terminate list */
> @@ -330,6 +334,7 @@ static struct scsi_host_template piix_sht = {
> static struct ata_port_operations piix_sata_ops = {
> .inherits =&ata_bmdma32_port_ops,
> .sff_irq_check = piix_irq_check,
> + .port_start = piix_port_start,
> };
>
> static struct ata_port_operations piix_pata_ops = {
> @@ -470,6 +475,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
> [ich8_2port_sata] =&ich8_2port_map_db,
> [ich8m_apple_sata] =&ich8m_apple_map_db,
> [tolapai_sata] =&tolapai_map_db,
> + [ich8_sata_snb] =&ich8_map_db,
> };
>
> static struct ata_port_info piix_port_info[] = {
> @@ -598,6 +604,19 @@ static struct ata_port_info piix_port_info[] = {
> .port_ops =&piix_vmw_ops,
> },
>
> + /*
> + * some Sandybridge chipsets have broken 32 mode up to now,
> + * see https://bugzilla.kernel.org/show_bug.cgi?id=40592
> + */
> + [ich8_sata_snb] =
> + {
> + .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
> + .pio_mask = ATA_PIO4,
> + .mwdma_mask = ATA_MWDMA2,
> + .udma_mask = ATA_UDMA6,
> + .port_ops =&piix_sata_ops,
> + },
> +
> };
>
> static struct pci_bits piix_enable_bits[] = {
> @@ -641,6 +660,14 @@ static const struct ich_laptop ich_laptop[] = {
> { 0, }
> };
>
> +static int piix_port_start(struct ata_port *ap)
> +{
> + if (!(ap->flags& PIIX_FLAG_PIO16))
> + ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
> +
> + return ata_bmdma_port_start(ap);
> +}
> +
> /**
> * ich_pata_cable_detect - Probe host controller cable detect info
> * @ap: Port for which cable detect info is desired
--
Tim Gardner tim.gardner at canonical.com
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