[PATCH 1/1] x86-32, resume: do a global tlb flush in S4 resume

Stefan Bader stefan.bader at canonical.com
Tue Apr 6 15:28:08 BST 2010


Colin Ian King wrote:
> I also think this should go into Karmic as a SRU. Shall I open up a bug
> against karmic and formally push it through the SRU process?
> 
Same bug is ok, just nominate for karmic. But sending the patch a second time
around for karmic helps to get it on patchworks for me.

Stefan

> Colin
> 
> On Tue, 2010-03-30 at 22:05 +0100, Andy Whitcroft wrote:
>> From: Shaohua Li <shaohua.li at intel.com>
>>
>> Colin King reported a strange oops in S4 resume code path (see below). The test
>> system has i5/i7 CPU. The kernel doesn't open PAE, so 4M page table is used.
>> The oops always happen a virtual address 0xc03ff000, which is mapped to the
>> last 4k of first 4M memory. Doing a global tlb flush fixes the issue.
>>
>> EIP: 0060:[<c0493a01>] EFLAGS: 00010086 CPU: 0
>> EIP is at copy_loop+0xe/0x15
>> EAX: 36aeb000 EBX: 00000000 ECX: 00000400 EDX: f55ad46c
>> ESI: 0f800000 EDI: c03ff000 EBP: f67fbec4 ESP: f67fbea8
>> DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
>> ...
>> ...
>> CR2: 00000000c03ff000
>>
>> Tested-by: Colin Ian King <colin.king at canonical.com>
>> Signed-off-by: Shaohua Li <shaohua.li at intel.com>
>> LKML-Reference: <20100305005932.GA22675 at sli10-desk.sh.intel.com>
>> Acked-by: Rafael J. Wysocki <rjw at sisk.pl>
>> Signed-off-by: H. Peter Anvin <hpa at zytor.com>
>> Cc: <stable at kernel.org>
>> Signed-off-by: Andy Whitcroft <apw at canonical.com>
>> ---
>>  arch/x86/power/hibernate_asm_32.S |   15 +++++++--------
>>  1 files changed, 7 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
>> index b641388..ad47dae 100644
>> --- a/arch/x86/power/hibernate_asm_32.S
>> +++ b/arch/x86/power/hibernate_asm_32.S
>> @@ -27,10 +27,17 @@ ENTRY(swsusp_arch_suspend)
>>  	ret
>>  
>>  ENTRY(restore_image)
>> +	movl	mmu_cr4_features, %ecx
>>  	movl	resume_pg_dir, %eax
>>  	subl	$__PAGE_OFFSET, %eax
>>  	movl	%eax, %cr3
>>  
>> +	jecxz	1f	# cr4 Pentium and higher, skip if zero
>> +	andl	$~(X86_CR4_PGE), %ecx
>> +	movl	%ecx, %cr4;  # turn off PGE
>> +	movl	%cr3, %eax;  # flush TLB
>> +	movl	%eax, %cr3
>> +1:
>>  	movl	restore_pblist, %edx
>>  	.p2align 4,,7
>>  
>> @@ -54,16 +61,8 @@ done:
>>  	movl	$swapper_pg_dir, %eax
>>  	subl	$__PAGE_OFFSET, %eax
>>  	movl	%eax, %cr3
>> -	/* Flush TLB, including "global" things (vmalloc) */
>>  	movl	mmu_cr4_features, %ecx
>>  	jecxz	1f	# cr4 Pentium and higher, skip if zero
>> -	movl	%ecx, %edx
>> -	andl	$~(X86_CR4_PGE), %edx
>> -	movl	%edx, %cr4;  # turn off PGE
>> -1:
>> -	movl	%cr3, %eax;  # flush TLB
>> -	movl	%eax, %cr3
>> -	jecxz	1f	# cr4 Pentium and higher, skip if zero
>>  	movl	%ecx, %cr4;  # turn PGE back on
>>  1:
>>  
>> -- 
>> 1.7.0
>>
>>
> 
> 
> 




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