[PATCH 5/9] PM: Fix the Deep-Idle after Standby LCD flickers

[Brad Figg]

From: Tawfik Bayouk <tawfik at marvell.com>

Signed-off-by: Tawfik Bayouk <tawfik at marvell.com>
Signed-off-by: Saeed Bishara <saeed at marvell.com>
Signed-off-by: Brad Figg <brad.figg at canonical.com>
---
 .../plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c   |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c b/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c
index 378c205..267f408 100755
--- a/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c
+++ b/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c
@@ -397,8 +397,10 @@ MV_STATUS mvPmuDeepIdle (MV_BOOL lcdRefresh)
 		return MV_FAIL;
 
 	/* mask out IRQ and FIQ from being assereted to the cpu */
+	/* Disable DDR SR by default */
 	reg = MV_REG_READ(PMU_CTRL_REG);
 	reg |= (PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	reg &= ~PMU_CTRL_DDR_SLF_RFRSH_EN_MASK;
 	MV_REG_WRITE(PMU_CTRL_REG, reg);
 
 	/* Set CPU power delay in TCLK cycles */
-- 
1.6.0.4