Fwd: e1000: backport ich9 support from 7.5.5 ?
Ben Collins
ben.collins at ubuntu.com
Wed Jul 4 17:50:18 UTC 2007
On Wed, 2007-07-04 at 13:24 -0400, Kyle McMartin wrote:
> Probably a much better idea than using e1000-ich9 for feisty/gutsy...
It's still a very extensive patch, so I wouldn't even want it in the
main kernel tree, which means it would be pretty much the same route,
lum/lbm, and not much gain.
I also don't like that it claims this patch against netdev-2.6 isn't
even tested other then compilation, and the 2.6.18 backport was only
lightly tested.
I feel more comfortable with the e1000-ich9 approach. Fewer potential
problems.
> --Kyle
>
> ----- Forwarded message from Mark McLoughlin <markmc at redhat.com> -----
>
> Sender: netdev-owner at vger.kernel.org
> From: Mark McLoughlin <markmc at redhat.com>
> Subject: e1000: backport ich9 support from 7.5.5 ?
> Message-Id: <1183138159.17243.16.camel at blaa>
> To: Auke Kok <auke-jan.h.kok at intel.com>
> Cc: netdev at vger.kernel.org, e1000-devel at lists.sourceforge.net
> Date: Fri, 29 Jun 2007 18:29:18 +0100
> Organization: Red Hat Ltd. Registered Address: Red Hat Ltd, Brian O'
> Donnell and Partners, 62 Merrion Square, Dublin 2, Ireland. Registered in
> the Companies Registration Office, Parnell House, 14 Parnell Square, Dublin
> 1, Ireland, at No. 304873 Directors: Charlie Peters (USA), Michael
> Cunningham (USA), Matt Parson (USA), Brendan Lane
> X-Mailer: Evolution 2.10.2 (2.10.2-2.fc7)
>
> Hi Auke,
> I understand there is some delay in getting e1000-7.5.5 into the
> upstream kernel given the major re-working of the chipset specific
> parts.
>
> I wonder would it be feasible in the meantime to backport the ich9
> support and push it upstream?
>
> A first-cut at the backport is attached. Note, this patch applies
> against latest netdev-2.6-git, but I haven't actually tested this
> version of the patch beyond compiling. A similar patch against 2.6.18
> worked fine with some light testing.
>
> Thanks,
> Mark.
>
> --- ./drivers/net/e1000/e1000_main.c.ich9 2007-06-29 17:45:55.000000000 +0100
> +++ ./drivers/net/e1000/e1000_main.c 2007-06-29 18:08:26.000000000 +0100
> @@ -105,8 +105,13 @@ static struct pci_device_id e1000_pci_tb
> INTEL_E1000_ETHERNET_DEVICE(0x10BA),
> INTEL_E1000_ETHERNET_DEVICE(0x10BB),
> INTEL_E1000_ETHERNET_DEVICE(0x10BC),
> + INTEL_E1000_ETHERNET_DEVICE(0x10BD),
> + INTEL_E1000_ETHERNET_DEVICE(0x10C0),
> + INTEL_E1000_ETHERNET_DEVICE(0x10C2),
> + INTEL_E1000_ETHERNET_DEVICE(0x10C3),
> INTEL_E1000_ETHERNET_DEVICE(0x10C4),
> INTEL_E1000_ETHERNET_DEVICE(0x10C5),
> + INTEL_E1000_ETHERNET_DEVICE(0x294C),
> /* required last entry */
> {0,}
> };
> @@ -412,6 +417,7 @@ e1000_release_hw_control(struct e1000_ad
> case e1000_82572:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
> E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
> ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
> @@ -449,6 +455,7 @@ e1000_get_hw_control(struct e1000_adapte
> case e1000_82572:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
> E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
> ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
> @@ -604,6 +611,7 @@ static void e1000_power_down_phy(struct
> case e1000_82573:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> if (e1000_check_mng_mode(&adapter->hw) ||
> e1000_check_phy_reset_block(&adapter->hw))
> goto out;
> @@ -703,6 +711,11 @@ e1000_reset(struct e1000_adapter *adapte
> break;
> case e1000_ich8lan:
> pba = E1000_PBA_8K;
> + break;
> + case e1000_ich9lan:
> +#define E1000_PBA_10K 0x000A
> + pba = E1000_PBA_10K;
> + break;
> case e1000_undefined:
> case e1000_num_macs:
> break;
> @@ -765,6 +778,7 @@ e1000_reset(struct e1000_adapter *adapte
> if (pba < min_rx_space) {
> switch (adapter->hw.mac_type) {
> case e1000_82573:
> + case e1000_ich9lan:
> /* ERT enabled in e1000_configure_rx */
> break;
> default:
> @@ -957,7 +971,8 @@ e1000_probe(struct pci_dev *pdev,
> err = -EIO;
> /* Flash BAR mapping must happen after e1000_sw_init
> * because it depends on mac_type */
> - if ((adapter->hw.mac_type == e1000_ich8lan) &&
> + if (((adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) &&
> (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
> flash_start = pci_resource_start(pdev, 1);
> flash_len = pci_resource_len(pdev, 1);
> @@ -975,7 +990,8 @@ e1000_probe(struct pci_dev *pdev,
> NETIF_F_HW_VLAN_TX |
> NETIF_F_HW_VLAN_RX |
> NETIF_F_HW_VLAN_FILTER;
> - if (adapter->hw.mac_type == e1000_ich8lan)
> + if ((adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan))
> netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
> }
>
> @@ -1057,6 +1073,7 @@ e1000_probe(struct pci_dev *pdev,
> eeprom_apme_mask = E1000_EEPROM_82544_APM;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> e1000_read_eeprom(&adapter->hw,
> EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
> eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
> @@ -1138,7 +1155,9 @@ e1000_probe(struct pci_dev *pdev,
> * DRV_LOAD until the interface is up. For all other cases,
> * let the f/w know that the h/w is now under the control
> * of the driver. */
> - if (adapter->hw.mac_type != e1000_82573 ||
> + if (((adapter->hw.mac_type != e1000_82573) &&
> + (adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) ||
> !e1000_check_mng_mode(&adapter->hw))
> e1000_get_hw_control(adapter);
>
> @@ -1420,7 +1439,9 @@ e1000_open(struct net_device *netdev)
>
> /* If AMT is enabled, let the firmware know that the network
> * interface is now open */
> - if (adapter->hw.mac_type == e1000_82573 &&
> + if (((adapter->hw.mac_type == e1000_82573) ||
> + (adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) &&
> e1000_check_mng_mode(&adapter->hw))
> e1000_get_hw_control(adapter);
>
> @@ -1496,7 +1517,9 @@ e1000_close(struct net_device *netdev)
>
> /* If AMT is enabled, let the firmware know that the network
> * interface is now closed */
> - if (adapter->hw.mac_type == e1000_82573 &&
> + if (((adapter->hw.mac_type == e1000_82573) ||
> + (adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) &&
> e1000_check_mng_mode(&adapter->hw))
> e1000_release_hw_control(adapter);
>
> @@ -2085,7 +2108,7 @@ e1000_configure_rx(struct e1000_adapter
> /* enable early receives on 82573, only takes effect if using > 2048
> * byte total frame size. for example only for jumbo frames */
> #define E1000_ERT_2048 0x100
> - if (hw->mac_type == e1000_82573)
> + if (hw->mac_type == e1000_82573 || hw->mac_type == e1000_ich9lan)
> E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
>
> /* Enable Receives */
> @@ -2430,12 +2453,14 @@ e1000_set_multi(struct net_device *netde
> uint32_t rctl;
> uint32_t hash_value;
> int i, rar_entries = E1000_RAR_ENTRIES;
> - int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
> + int mta_reg_count = ((hw->mac_type == e1000_ich8lan) || (hw->mac_type == e1000_ich9lan)) ?
> E1000_NUM_MTA_REGISTERS_ICH8LAN :
> E1000_NUM_MTA_REGISTERS;
>
> if (adapter->hw.mac_type == e1000_ich8lan)
> rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
> + else if (adapter->hw.mac_type == e1000_ich9lan)
> + rar_entries = E1000_RAR_ENTRIES_ICH9LAN;
>
> /* reserve RAR[14] for LAA over-write work-around */
> if (adapter->hw.mac_type == e1000_82571)
> @@ -3319,6 +3344,7 @@ e1000_xmit_frame(struct sk_buff *skb, st
> case e1000_82572:
> case e1000_82573:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> pull_size = min((unsigned int)4, skb->data_len);
> if (!__pskb_pull_tail(skb, pull_size)) {
> DPRINTK(DRV, ERR,
> @@ -3516,6 +3542,14 @@ e1000_change_mtu(struct net_device *netd
> /* ERT will be enabled later to enable wire speed receives */
>
> /* fall through to get support */
> + case e1000_ich9lan:
> + if ((adapter->hw.phy_type == e1000_phy_ife) &&
> + (max_frame > ETH_FRAME_LEN + ETHERNET_FCS_SIZE)) {
> + DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
> + return -EINVAL;
> + }
> +
> + /* fall through to get support */
> case e1000_82571:
> case e1000_82572:
> case e1000_80003es2lan:
> @@ -3604,7 +3638,8 @@ e1000_update_stats(struct e1000_adapter
> adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
> adapter->stats.roc += E1000_READ_REG(hw, ROC);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
> adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
> adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
> @@ -3640,7 +3675,8 @@ e1000_update_stats(struct e1000_adapter
> adapter->stats.toth += E1000_READ_REG(hw, TOTH);
> adapter->stats.tpr += E1000_READ_REG(hw, TPR);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
> adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
> adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
> @@ -3671,7 +3707,8 @@ e1000_update_stats(struct e1000_adapter
> adapter->stats.iac += E1000_READ_REG(hw, IAC);
> adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
> adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
> adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
> @@ -4943,7 +4980,8 @@ e1000_vlan_rx_register(struct net_device
> ctrl |= E1000_CTRL_VME;
> E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> /* enable VLAN receive filtering */
> rctl = E1000_READ_REG(&adapter->hw, RCTL);
> rctl |= E1000_RCTL_VFE;
> @@ -4957,7 +4995,8 @@ e1000_vlan_rx_register(struct net_device
> ctrl &= ~E1000_CTRL_VME;
> E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> /* disable VLAN filtering */
> rctl = E1000_READ_REG(&adapter->hw, RCTL);
> rctl &= ~E1000_RCTL_VFE;
> @@ -5202,7 +5241,9 @@ e1000_resume(struct pci_dev *pdev)
> * DRV_LOAD until the interface is up. For all other cases,
> * let the f/w know that the h/w is now under the control
> * of the driver. */
> - if (adapter->hw.mac_type != e1000_82573 ||
> + if (((adapter->hw.mac_type != e1000_82573) &&
> + (adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) ||
> !e1000_check_mng_mode(&adapter->hw))
> e1000_get_hw_control(adapter);
>
> @@ -5314,7 +5355,9 @@ static void e1000_io_resume(struct pci_d
> * DRV_LOAD until the interface is up. For all other cases,
> * let the f/w know that the h/w is now under the control
> * of the driver. */
> - if (adapter->hw.mac_type != e1000_82573 ||
> + if (((adapter->hw.mac_type != e1000_82573) &&
> + (adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) ||
> !e1000_check_mng_mode(&adapter->hw))
> e1000_get_hw_control(adapter);
>
> --- ./drivers/net/e1000/e1000_hw.c.ich9 2007-06-29 17:45:55.000000000 +0100
> +++ ./drivers/net/e1000/e1000_hw.c 2007-06-29 18:14:36.000000000 +0100
> @@ -414,6 +414,13 @@ e1000_set_mac_type(struct e1000_hw *hw)
> case E1000_DEV_ID_ICH8_IGP_M:
> hw->mac_type = e1000_ich8lan;
> break;
> + case E1000_DEV_ID_ICH9_IFE:
> + case E1000_DEV_ID_ICH9_IFE_GT:
> + case E1000_DEV_ID_ICH9_IFE_G:
> + case E1000_DEV_ID_ICH9_IGP_AMT:
> + case E1000_DEV_ID_ICH9_IGP_C:
> + hw->mac_type = e1000_ich9lan;
> + break;
> default:
> /* Should never have loaded on this device */
> return -E1000_ERR_MAC_TYPE;
> @@ -421,6 +428,7 @@ e1000_set_mac_type(struct e1000_hw *hw)
>
> switch (hw->mac_type) {
> case e1000_ich8lan:
> + case e1000_ich9lan:
> hw->swfwhw_semaphore_present = TRUE;
> hw->asf_firmware_present = TRUE;
> break;
> @@ -496,6 +504,7 @@ e1000_set_media_type(struct e1000_hw *hw
> hw->media_type = e1000_media_type_fiber;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> case e1000_82573:
> /* The STATUS_TBIMODE bit is reserved or reused for the this
> * device.
> @@ -632,6 +641,7 @@ e1000_reset_hw(struct e1000_hw *hw)
> E1000_WRITE_REG(hw, CTRL_DUP, (ctrl | E1000_CTRL_RST));
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> if (!hw->phy_reset_disable &&
> e1000_check_phy_reset_block(hw) == E1000_SUCCESS) {
> /* e1000_ich8lan PHY HW reset requires MAC CORE reset
> @@ -722,7 +732,7 @@ e1000_reset_hw(struct e1000_hw *hw)
> e1000_pci_set_mwi(hw);
> }
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> uint32_t kab = E1000_READ_REG(hw, KABGTXD);
> kab |= E1000_KABGTXD_BGSQLBIAS;
> E1000_WRITE_REG(hw, KABGTXD, kab);
> @@ -820,6 +830,9 @@ e1000_initialize_hardware_bits(struct e1
> (hw->device_id != E1000_DEV_ID_ICH8_IGP_M)))
> reg_tarc0 |= ((1 << 29)|(1 << 28));
>
> + /* fall through */
> +
> + case e1000_ich9lan:
> reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
> reg_ctrl_ext |= (1 << 22);
> E1000_WRITE_REG(hw, CTRL_EXT, reg_ctrl_ext);
> @@ -901,7 +914,8 @@ e1000_init_hw(struct e1000_hw *hw)
> /* Disabling VLAN filtering. */
> DEBUGOUT("Initializing the IEEE VLAN\n");
> /* VET hardcoded to standard value and VFTA removed in ICH8 LAN */
> - if (hw->mac_type != e1000_ich8lan) {
> + if ((hw->mac_type != e1000_ich8lan) &&
> + (hw->mac_type != e1000_ich9lan)) {
> if (hw->mac_type < e1000_82545_rev_3)
> E1000_WRITE_REG(hw, VET, 0);
> e1000_clear_vfta(hw);
> @@ -933,7 +947,8 @@ e1000_init_hw(struct e1000_hw *hw)
> /* Zero out the Multicast HASH table */
> DEBUGOUT("Zeroing the MTA\n");
> mta_size = E1000_MC_TBL_SIZE;
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> mta_size = E1000_MC_TBL_SIZE_ICH8LAN;
> for (i = 0; i < mta_size; i++) {
> E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
> @@ -979,7 +994,8 @@ e1000_init_hw(struct e1000_hw *hw)
> }
>
> /* More time needed for PHY to initialize */
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> msleep(15);
>
> /* Call a subroutine to configure the link and setup flow control. */
> @@ -1024,6 +1040,7 @@ e1000_init_hw(struct e1000_hw *hw)
> case e1000_82571:
> case e1000_82572:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> ctrl = E1000_READ_REG(hw, TXDCTL1);
> ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB;
> E1000_WRITE_REG(hw, TXDCTL1, ctrl);
> @@ -1137,6 +1154,7 @@ e1000_setup_link(struct e1000_hw *hw)
> if (hw->fc == E1000_FC_DEFAULT) {
> switch (hw->mac_type) {
> case e1000_ich8lan:
> + case e1000_ich9lan:
> case e1000_82573:
> hw->fc = E1000_FC_FULL;
> break;
> @@ -1204,7 +1222,8 @@ e1000_setup_link(struct e1000_hw *hw)
> DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
>
> /* FCAL/H and FCT are hardcoded to standard values in e1000_ich8lan. */
> - if (hw->mac_type != e1000_ich8lan) {
> + if ((hw->mac_type != e1000_ich8lan) &&
> + (hw->mac_type != e1000_ich9lan)) {
> E1000_WRITE_REG(hw, FCT, FLOW_CONTROL_TYPE);
> E1000_WRITE_REG(hw, FCAH, FLOW_CONTROL_ADDRESS_HIGH);
> E1000_WRITE_REG(hw, FCAL, FLOW_CONTROL_ADDRESS_LOW);
> @@ -1472,7 +1491,8 @@ e1000_copper_link_igp_setup(struct e1000
>
> /* Wait 15ms for MAC to configure PHY from eeprom settings */
> msleep(15);
> - if (hw->mac_type != e1000_ich8lan) {
> + if ((hw->mac_type != e1000_ich8lan) &&
> + (hw->mac_type != e1000_ich9lan)) {
> /* Configure activity LED after PHY reset */
> led_ctrl = E1000_READ_REG(hw, LEDCTL);
> led_ctrl &= IGP_ACTIVITY_LED_MASK;
> @@ -1973,6 +1993,7 @@ e1000_setup_copper_link(struct e1000_hw
> switch (hw->mac_type) {
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> /* Set the mac to wait the maximum time between each
> * iteration and increase the max iterations when
> * polling the phy; this fixes erroneous timeouts at 10Mbps. */
> @@ -3212,7 +3233,9 @@ e1000_get_speed_and_duplex(struct e1000_
> return ret_val;
> }
>
> - if ((hw->phy_type == e1000_phy_igp_3) && (*speed == SPEED_1000)) {
> + if ((hw->mac_type == e1000_ich8lan) &&
> + (hw->phy_type == e1000_phy_igp_3) &&
> + (*speed == SPEED_1000)) {
> ret_val = e1000_kumeran_lock_loss_workaround(hw);
> if (ret_val)
> return ret_val;
> @@ -4124,6 +4147,7 @@ e1000_detect_gig_phy(struct e1000_hw *hw
> if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> if (hw->phy_id == IGP03E1000_E_PHY_ID) match = TRUE;
> if (hw->phy_id == IFE_E_PHY_ID) match = TRUE;
> if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = TRUE;
> @@ -4572,6 +4596,7 @@ e1000_init_eeprom_params(struct e1000_hw
> eeprom->use_eewr = FALSE;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> {
> int32_t i = 0;
> uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_GFPREG);
> @@ -5191,7 +5216,8 @@ e1000_is_onboard_nvm_eeprom(struct e1000
>
> DEBUGFUNC("e1000_is_onboard_nvm_eeprom");
>
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> return FALSE;
>
> if (hw->mac_type == e1000_82573) {
> @@ -5244,7 +5270,8 @@ e1000_validate_eeprom_checksum(struct e1
> }
> }
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan) ) {
> /* Drivers must allocate the shadow ram structure for the
> * EEPROM checksum to be updated. Otherwise, this bit as well
> * as the checksum must both be set correctly for this
> @@ -5587,7 +5614,8 @@ e1000_commit_shadow_ram(struct e1000_hw
> }
> }
>
> - if (hw->mac_type == e1000_ich8lan && hw->eeprom_shadow_ram != NULL) {
> + if (((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) && hw->eeprom_shadow_ram != NULL) {
> /* We're writing to the opposite bank so if we're on bank 1,
> * write to bank 0 etc. We also need to erase the segment that
> * is going to be written */
> @@ -5767,6 +5795,8 @@ e1000_init_rx_addrs(struct e1000_hw *hw)
> rar_num -= 1;
> if (hw->mac_type == e1000_ich8lan)
> rar_num = E1000_RAR_ENTRIES_ICH8LAN;
> + else if (hw->mac_type == e1000_ich9lan)
> + rar_num = E1000_RAR_ENTRIES_ICH9LAN;
>
> /* Zero out the other 15 receive addresses. */
> DEBUGOUT("Clearing RAR[1-15]\n");
> @@ -5799,7 +5829,7 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
> * LSB MSB
> */
> case 0:
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> /* [47:38] i.e. 0x158 for above example address */
> hash_value = ((mc_addr[4] >> 6) | (((uint16_t) mc_addr[5]) << 2));
> } else {
> @@ -5808,7 +5838,7 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
> }
> break;
> case 1:
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> /* [46:37] i.e. 0x2B1 for above example address */
> hash_value = ((mc_addr[4] >> 5) | (((uint16_t) mc_addr[5]) << 3));
> } else {
> @@ -5817,7 +5847,7 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
> }
> break;
> case 2:
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> /*[45:36] i.e. 0x163 for above example address */
> hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
> } else {
> @@ -5826,7 +5856,7 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
> }
> break;
> case 3:
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> /* [43:34] i.e. 0x18D for above example address */
> hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
> } else {
> @@ -5837,7 +5867,7 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
> }
>
> hash_value &= 0xFFF;
> - if (hw->mac_type == e1000_ich8lan)
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan)
> hash_value &= 0x3FF;
>
> return hash_value;
> @@ -5866,7 +5896,8 @@ e1000_mta_set(struct e1000_hw *hw,
> * register are determined by the lower 5 bits of the value.
> */
> hash_reg = (hash_value >> 5) & 0x7F;
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> hash_reg &= 0x1F;
>
> hash_bit = hash_value & 0x1F;
> @@ -5963,7 +5994,8 @@ e1000_write_vfta(struct e1000_hw *hw,
> {
> uint32_t temp;
>
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> return;
>
> if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) {
> @@ -5991,7 +6023,8 @@ e1000_clear_vfta(struct e1000_hw *hw)
> uint32_t vfta_offset = 0;
> uint32_t vfta_bit_in_reg = 0;
>
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> return;
>
> if (hw->mac_type == e1000_82573) {
> @@ -6049,7 +6082,8 @@ e1000_id_led_init(struct e1000_hw * hw)
> eeprom_data = ID_LED_DEFAULT_82573;
> else if ((eeprom_data == ID_LED_RESERVED_0000) ||
> (eeprom_data == ID_LED_RESERVED_FFFF)) {
> - if (hw->mac_type == e1000_ich8lan)
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan))
> eeprom_data = ID_LED_DEFAULT_ICH8LAN;
> else
> eeprom_data = ID_LED_DEFAULT;
> @@ -6360,7 +6394,8 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw
> temp = E1000_READ_REG(hw, XOFFTXC);
> temp = E1000_READ_REG(hw, FCRUC);
>
> - if (hw->mac_type != e1000_ich8lan) {
> + if ((hw->mac_type != e1000_ich8lan) &&
> + (hw->mac_type != e1000_ich9lan)) {
> temp = E1000_READ_REG(hw, PRC64);
> temp = E1000_READ_REG(hw, PRC127);
> temp = E1000_READ_REG(hw, PRC255);
> @@ -6389,7 +6424,8 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw
> temp = E1000_READ_REG(hw, TPR);
> temp = E1000_READ_REG(hw, TPT);
>
> - if (hw->mac_type != e1000_ich8lan) {
> + if ((hw->mac_type != e1000_ich8lan) &&
> + (hw->mac_type != e1000_ich9lan)) {
> temp = E1000_READ_REG(hw, PTC64);
> temp = E1000_READ_REG(hw, PTC127);
> temp = E1000_READ_REG(hw, PTC255);
> @@ -6421,7 +6457,7 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw
> temp = E1000_READ_REG(hw, IAC);
> temp = E1000_READ_REG(hw, ICRXOC);
>
> - if (hw->mac_type == e1000_ich8lan) return;
> + if ((hw->mac_type == e1000_ich8lan) || (hw->mac_type == e1000_ich9lan)) return;
>
> temp = E1000_READ_REG(hw, ICRXPTC);
> temp = E1000_READ_REG(hw, ICRXATC);
> @@ -6614,9 +6650,16 @@ e1000_get_bus_info(struct e1000_hw *hw)
> PCI_EX_LINK_WIDTH_SHIFT;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> hw->bus_type = e1000_bus_type_pci_express;
> hw->bus_speed = e1000_bus_speed_2500;
> - hw->bus_width = e1000_bus_width_pciex_1;
> + /* ICH devices are "PCI Express"-ish. They have
> + * a configuration space, but do not contain
> + * PCI Express Capability registers, so bus width
> + * must be hardcoded.
> + */
> + if (hw->bus_width == e1000_bus_width_unknown)
> + hw->bus_width = e1000_bus_width_pciex_1;
> break;
> default:
> status = E1000_READ_REG(hw, STATUS);
> @@ -7252,7 +7295,8 @@ e1000_set_d3_lplu_state(struct e1000_hw
> ret_val = e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data);
> if (ret_val)
> return ret_val;
> - } else if (hw->mac_type == e1000_ich8lan) {
> + } else if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> /* MAC writes into PHY register based on the state transition
> * and start auto-negotiation. SW driver can overwrite the settings
> * in CSR PHY power control E1000_PHY_CTRL register. */
> @@ -7271,7 +7315,8 @@ e1000_set_d3_lplu_state(struct e1000_hw
> if (ret_val)
> return ret_val;
> } else {
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU;
> E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
> } else {
> @@ -7322,7 +7367,8 @@ e1000_set_d3_lplu_state(struct e1000_hw
> if (ret_val)
> return ret_val;
> } else {
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> phy_ctrl |= E1000_PHY_CTRL_NOND0A_LPLU;
> E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
> } else {
> @@ -7374,7 +7420,8 @@ e1000_set_d0_lplu_state(struct e1000_hw
> if (hw->mac_type <= e1000_82547_rev_2)
> return E1000_SUCCESS;
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> phy_ctrl = E1000_READ_REG(hw, PHY_CTRL);
> } else {
> ret_val = e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
> @@ -7383,7 +7430,8 @@ e1000_set_d0_lplu_state(struct e1000_hw
> }
>
> if (!active) {
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU;
> E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
> } else {
> @@ -7424,7 +7472,8 @@ e1000_set_d0_lplu_state(struct e1000_hw
>
> } else {
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU;
> E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
> } else {
> @@ -7711,7 +7760,8 @@ e1000_check_mng_mode(struct e1000_hw *hw
>
> fwsm = E1000_READ_REG(hw, FWSM);
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> if ((fwsm & E1000_FWSM_MODE_MASK) ==
> (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
> return TRUE;
> @@ -8020,6 +8070,7 @@ e1000_get_auto_rd_done(struct e1000_hw *
> case e1000_82573:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> while (timeout) {
> if (E1000_READ_REG(hw, EECD) & E1000_EECD_AUTO_RD)
> break;
> @@ -8248,7 +8299,8 @@ e1000_check_phy_reset_block(struct e1000
> uint32_t manc = 0;
> uint32_t fwsm = 0;
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if ((hw->mac_type == e1000_ich8lan) ||
> + (hw->mac_type == e1000_ich9lan)) {
> fwsm = E1000_READ_REG(hw, FWSM);
> return (fwsm & E1000_FWSM_RSPCIPHY) ? E1000_SUCCESS
> : E1000_BLK_PHY_RESET;
> @@ -8280,6 +8332,7 @@ e1000_arc_subsystem_valid(struct e1000_h
> return TRUE;
> break;
> case e1000_ich8lan:
> + case e1000_ich9lan:
> return TRUE;
> default:
> break;
> @@ -8346,7 +8399,7 @@ e1000_get_software_flag(struct e1000_hw
>
> DEBUGFUNC("e1000_get_software_flag");
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> while (timeout) {
> extcnf_ctrl = E1000_READ_REG(hw, EXTCNF_CTRL);
> extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG;
> @@ -8384,7 +8437,7 @@ e1000_release_software_flag(struct e1000
>
> DEBUGFUNC("e1000_release_software_flag");
>
> - if (hw->mac_type == e1000_ich8lan) {
> + if (hw->mac_type == e1000_ich8lan || hw->mac_type == e1000_ich9lan) {
> extcnf_ctrl= E1000_READ_REG(hw, EXTCNF_CTRL);
> extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
> E1000_WRITE_REG(hw, EXTCNF_CTRL, extcnf_ctrl);
> @@ -8887,6 +8940,11 @@ e1000_erase_ich8_4k_segment(struct e1000
> } else if (hsfsts.hsf_status.berasesz == 0x1) {
> bank_size = ICH_FLASH_SEG_SIZE_4K;
> iteration = 1;
> + } else if (hsfsts.hsf_status.berasesz == 0x2) {
> + if (hw->mac_type != e1000_ich9lan)
> + return error;
> + bank_size = ICH_FLASH_SEG_SIZE_8K;
> + iteration = 1;
> } else if (hsfsts.hsf_status.berasesz == 0x3) {
> bank_size = ICH_FLASH_SEG_SIZE_64K;
> iteration = 1;
> --- ./drivers/net/e1000/e1000_ethtool.c.ich9 2007-06-29 17:45:55.000000000 +0100
> +++ ./drivers/net/e1000/e1000_ethtool.c 2007-06-29 17:59:18.000000000 +0100
> @@ -608,6 +608,7 @@ e1000_get_drvinfo(struct net_device *net
> case e1000_82573:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> sprintf(firmware_version, "%d.%d-%d",
> (eeprom_data & 0xF000) >> 12,
> (eeprom_data & 0x0FF0) >> 4,
> @@ -785,6 +786,7 @@ e1000_reg_test(struct e1000_adapter *ada
> break;
> case e1000_82573:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> toggle = 0x7FFFF033;
> break;
> default:
> @@ -805,7 +807,8 @@ e1000_reg_test(struct e1000_adapter *ada
> /* restore previous status */
> E1000_WRITE_REG(&adapter->hw, STATUS, before);
>
> - if (adapter->hw.mac_type != e1000_ich8lan) {
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan)) {
> REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
> REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
> REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
> @@ -825,8 +828,9 @@ e1000_reg_test(struct e1000_adapter *ada
>
> REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
>
> - before = (adapter->hw.mac_type == e1000_ich8lan ?
> - 0x06C3B33E : 0x06DFB3FE);
> + before = ((adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) ?
> + 0x06C3B33E : 0x06DFB3FE;
> REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
> REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
>
> @@ -834,12 +838,24 @@ e1000_reg_test(struct e1000_adapter *ada
>
> REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
> REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
> - if (adapter->hw.mac_type != e1000_ich8lan)
> + if ((adapter->hw.mac_type != e1000_ich8lan) &&
> + (adapter->hw.mac_type != e1000_ich9lan))
> REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
> REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
> REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
> - value = (adapter->hw.mac_type == e1000_ich8lan ?
> - E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
> +
> + switch (adapter->hw.mac_type) {
> + case e1000_ich8lan:
> + value = E1000_RAR_ENTRIES_ICH8LAN;
> + break;
> + case e1000_ich9lan:
> + value = E1000_RAR_ENTRIES_ICH9LAN;
> + break;
> + default:
> + value = E1000_RAR_ENTRIES;
> + break;
> + }
> +
> for (i = 0; i < value; i++) {
> REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
> 0xFFFFFFFF);
> @@ -854,8 +870,9 @@ e1000_reg_test(struct e1000_adapter *ada
>
> }
>
> - value = (adapter->hw.mac_type == e1000_ich8lan ?
> - E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
> + value = ((adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) ?
> + E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE;
> for (i = 0; i < value; i++)
> REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
>
> @@ -927,7 +944,8 @@ e1000_intr_test(struct e1000_adapter *ad
> /* Test each interrupt */
> for (; i < 10; i++) {
>
> - if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
> + if (((adapter->hw.mac_type == e1000_ich8lan) ||
> + (adapter->hw.mac_type == e1000_ich9lan)) && i == 8)
> continue;
>
> /* Interrupt to test */
> @@ -1374,6 +1392,7 @@ e1000_set_phy_loopback(struct e1000_adap
> case e1000_82573:
> case e1000_80003es2lan:
> case e1000_ich8lan:
> + case e1000_ich9lan:
> return e1000_integrated_phy_loopback(adapter);
> break;
>
> --- ./drivers/net/e1000/e1000_hw.h.ich9 2007-06-29 17:45:55.000000000 +0100
> +++ ./drivers/net/e1000/e1000_hw.h 2007-06-29 17:59:18.000000000 +0100
> @@ -62,6 +62,7 @@ typedef enum {
> e1000_82573,
> e1000_80003es2lan,
> e1000_ich8lan,
> + e1000_ich9lan,
> e1000_num_macs
> } e1000_mac_type;
>
> @@ -497,6 +498,11 @@ int32_t e1000_check_phy_reset_block(stru
> #define E1000_DEV_ID_ICH8_IFE_G 0x10C5
> #define E1000_DEV_ID_ICH8_IGP_M 0x104D
>
> +#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
> +#define E1000_DEV_ID_ICH9_IGP_C 0x294C
> +#define E1000_DEV_ID_ICH9_IFE 0x10C0
> +#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3
> +#define E1000_DEV_ID_ICH9_IFE_G 0x10C2
>
> #define NODE_ADDRESS_SIZE 6
> #define ETH_LENGTH_OF_ADDRESS 6
> @@ -583,6 +589,7 @@ int32_t e1000_check_phy_reset_block(stru
> #define E1000_RAR_ENTRIES 15
>
> #define E1000_RAR_ENTRIES_ICH8LAN 6
> +#define E1000_RAR_ENTRIES_ICH9LAN 7
>
> #define MIN_NUMBER_OF_DESCRIPTORS 8
> #define MAX_NUMBER_OF_DESCRIPTORS 0xFFF8
> @@ -3274,6 +3281,7 @@ struct e1000_host_command_info {
> #define ICH_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */
> #define ICH_FLASH_SEG_SIZE_256 256
> #define ICH_FLASH_SEG_SIZE_4K 4096
> +#define ICH_FLASH_SEG_SIZE_8K 8192
> #define ICH_FLASH_SEG_SIZE_64K 65536
>
> #define ICH_CYCLE_READ 0x0
>
>
> ----- End forwarded message -----
>
--
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