<HTML> <HEAD> <TITLE>fwts log</TITLE> </HEAD> <BODY> <STYLE> .style_critical { background-color: red; font-weight: bold; text-align: center; vertical-align: center } .style_high { background-color: orange; font-weight: bold; text-align: center; vertical-align: center } .style_medium { background-color: yellow; font-weight: bold; text-align: center; vertical-align: center } .style_low { background-color: #9acd32; font-weight: bold; text-align: center; vertical-align: center } .style_passed { background-color: green; font-weight: bold; text-align: center; vertical-align: center } .style_advice { text-align: center; vertical-align: center; font-weight: bold } .style_advice_info { font-style: italic; font-weight: bold }.style_skipped { background-color: wheat; text-align: center; vertical-align: center } .style_heading { background-color: wheat; font-weight: bold; text-align: center } .style_summary { font-weight: bold } .style_error { background-color: orange; font-weight: bold; text-align: center; vertical-align: center } .style_subtest { background-color: lightgray; } .style_infos { max-width:90em } .style_code { font-family: "courier","mono"; font-size:0.75em; overflow:auto; width:90%; line-height:1.08em; font-stretch:extra-condensed; word-wrap:normal } </STYLE> <TABLE WIDTH=1024> </TR> <TR><TD class=style_heading COLSPAN=2>Firmware Test Suite</TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Results generated by fwts: Version V21.01.00 (2021-01-20 08:31:44).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Some of this work - Copyright (c) 1999 - 2021, Intel Corp. All rights reserved.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Some of this work - Copyright (c) 2010 - 2021, Canonical.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Some of this work - Copyright (c) 2016 - 2021, IBM.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Some of this work - Copyright (c) 2017 - 2021, ARM Ltd.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test run on 27/05/21 at 08:55:24 on host Linux ubuntu 5.4.0-64-generic #72-Ubuntu SMP Fri Jan 15 10:27:54 UTC 2021 x86_64.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Command: "fwts --force-clean --batch --uefitests --skip-test=s3 --show-progress-dialog --log-type plaintext".</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Running tests: version bios_info power_mgmt reserv_mem prd_info oops olog klog bmc_info clog mtrr acpiinfo dt_sysinfo dt_base cpu_info mem_info esrt uefirtauthvar uefibootpath securebootcert uefirtmisc uefirtvariable uefirttime csm maxreadreq crs aspm mtd_info dmicheck microcode msr nx cpufreq maxfreq virt pnp pciirq mpcheck hda_audio ebda bios32 apicedge xenv xsdt wsmt wpbt wmi wdat wakealarm waet uefi tpm2 tcpa stao srat spmi spcr slit slic sdev sdei sbst rsdt rsdp rasf pptt pmtt pdtt pcct pcc osilinux nfit method msdm msct mpst mchi mcfg madt lpit iort hmat hpet hest gtdt fpdt fan fadt facs erst einj ecdt drtm dppt dmar acpi_wpc acpi_time acpi_als acpi_nvdimm acpi_lid acpi_slpb acpi_pwrb acpi_ec smart_battery acpi_battery acpi_ac dbg2 dbgp cstates csrt cpep checksum autobrightness boot bgrt bert aspt asf apicinstance acpitables.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>version: Gather kernel system information.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 4: Gather kernel signature.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Signature: Ubuntu 5.4.0-64.72-generic 5.4.78</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 4: Gather kernel system information.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Kernel Version: Linux version 5.4.0-64-generic (buildd@lcy01-amd64-021) (gcc version 9.3.0 (Ubuntu 9.3.0-17ubuntu1~20.04)) #72-Ubuntu SMP Fri Jan 15 10:27:54 UTC 2021</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 4: Gather kernel boot command line.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Kernel boot command line: BOOT_IMAGE=/boot/vmlinuz root=LABEL=writable ro console=tty1 console=ttyS0 quiet</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 4: Gather ACPI driver version.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ACPICA Version: 20190816</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 4 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>bios_info: Gather BIOS DMI information.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Gather BIOS DMI information</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>BIOS Vendor : HPE</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>BIOS Version : U61</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>BIOS Release Date : 05/22/2021</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Board Name : ProLiant ML30 Gen10Plus</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Board Serial # : D00110800033J0SA</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Board Version : </PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Board Asset Tag : </PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Chassis Serial # : SerNum.ACC</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Chassis Type : 7</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Chassis Vendor : HPE</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Chassis Version : </PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Chassic Asset Tag : </PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Product Name : ProLiant ML30 Gen10Plus</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Product Serial # : SerNum.ACC</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Product UUID : 646f7250-4449-6553-724e-756d2e414343</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Product Version : </PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>System Vendor : HPE</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 1 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>power_mgmt: OPAL Processor Power Management DT Validation Tests</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 2 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>reserv_mem: OPAL Reserved memory DT Validation Test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>prd_info: OPAL Processor Recovery Diagnostics Info</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>oops: Scan kernel log for Oopses.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Kernel log oops check.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Found no oopses in kernel log.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Found no WARN_ON warnings in kernel log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>2 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>olog: Run OLOG scan and analysis checks.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>OLOG without any parameters on the platform you are running does nothing, please specify -o for custom log analysis.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>PPC supports dump and analysis of the default firmware logs.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>klog: Scan kernel log for errors and warnings.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Kernel log error check.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Kernel message: [ 0.166932] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>This is not exactly a failure but a warning from the kernel. The MSR_IA32_ENERGY_PERF_BIAS was initialized and defaulted to a high performance bias setting. The kernel has detected this and changed it down to a 'normal' bias setting.</TD> </TR> <TR> <TD class=style_high>FAILED [HIGH]</TD> <TD>HIGH Kernel message: [ 0.380305] tpm tpm0: [Firmware Bug]: TPM interrupt not working, polling instead</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The kernel has detected a Firmware bug in the BIOS or ACPI which needs investigating and fixing.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Found 1 unique errors in kernel log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 1 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>bmc_info: BMC Info</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: BMC Info</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>IPMI Version is 2.0 </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>BMC info passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>clog: Scan coreboot log for errors and warnings.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>coreboot log not available, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mtrr: MTRR tests.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>MTRR overview</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>-------------</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Reg 0: 0x00000000ff000000 - 0x00000000ffffffff ( 16 MB) Write-Protect</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Reg 1: 0x00000000a2000000 - 0x00000000a3ffffff ( 32 MB) Write-Protect</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Reg 2: 0x0000000000000000 - 0x000000007fffffff ( 2048 MB) Write-Back</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Reg 4: 0x0000000100000000 - 0x00000001ffffffff ( 4096 MB) Write-Back</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Reg 5: 0x0000000200000000 - 0x00000003ffffffff ( 8192 MB) Write-Back</PRE></TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 4: Validate MTRR default enabled.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MTRRs enabled flag is set in MTRR_DEF_TYPE MSR correctly.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>fixed MTRRs enabled flag is set in MTRR_DEF_TYPE MSR correctly.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 4: Validate the kernel MTRR IOMEM setup.</TD> </TR> <TR> <TD class=style_critical>FAILED [CRITICAL]</TD> <TD>Memory range 0xa2000000 to 0xa3ffffff (0000:01:00.0) has incorrect attribute Write-Protect.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 4: Validate the MTRR setup across all processors.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>All processors have the a consistent MTRR setup.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 4: Test for AMD MtrrFixDramModEn being cleared by the BIOS.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>CPU is not an AMD, cannot test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>3 passed, 1 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpiinfo: General ACPI information test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 3: Determine Kernel ACPI version.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Kernel ACPICA driver version: 20190816, supports ACPI 6.3</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 3: Determine machine's ACPI version.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>FADT X_FIRMWARE_CTRL 64 bit pointer was zero, falling back to using FIRMWARE_CTRL 32 bit pointer.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FACP ACPI Version: 6.1</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 3: Determine AML compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Determine the compiler used to generate the ACPI AML in the DSDT and SSDT.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table DSDT, OEM HPE , created with HPE (Unknown (HPE )) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT0, OEM HPE , created with INTL (Intel) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT1, OEM HPE , created with INTL (Intel) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT2, OEM HPE , created with HPE (Unknown (HPE )) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT3, OEM HPE , created with HPE (Unknown (HPE )) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT4, OEM HPE , created with INTL (Intel) compiler.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 3 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dt_sysinfo: Device tree system information test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 4 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dt_base: Base device tree validity check</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 3 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>cpu_info: OPAL CPU Info</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mem_info: OPAL MEM Info</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>esrt: Sanity check UEFI ESRT Table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Cannot find ESRT table, firmware seems not supported. Aborted.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>Aborted test, initialisation failed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 1 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefirtauthvar: Authenticated variable tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 11: Create authenticated variable test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>EFI_INVALID_PARAMETER shall be returned, when firmware doesn't support these operations with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS or EFI_VARIABLE_APPEND_WRITE attributes is set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 11: Authenticated variable test with the same authenticated variable.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test variable, AuthVarCreate, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 11: Authenticated variable test with another valid authenticated variable.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test variable, AuthVarCreate, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 11: Append authenticated variable test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test variable, AuthVarCreate, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 11: Update authenticated variable test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test data, AuthVarAppend, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 11: Authenticated variable test with old authenticated variable.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test variable, AuthVarUpdate, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 7 of 11: Delete authenticated variable test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>The test data, AuthVarCreate, doesn't exist, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 8 of 11: Authenticated variable test with invalid modified data.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>EFI_INVALID_PARAMETER shall be returned, when firmware doesn't support these operations with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS or EFI_VARIABLE_APPEND_WRITE attributes is set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 9 of 11: Authenticated variable test with invalid modified timestamp.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>EFI_INVALID_PARAMETER shall be returned, when firmware doesn't support these operations with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS or EFI_VARIABLE_APPEND_WRITE attributes is set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 10 of 11: Authenticated variable test with different guid.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>EFI_INVALID_PARAMETER shall be returned, when firmware doesn't support these operations with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS or EFI_VARIABLE_APPEND_WRITE attributes is set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 11 of 11: Set and delete authenticated variable created by different key test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>EFI_INVALID_PARAMETER shall be returned, when firmware doesn't support these operations with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS or EFI_VARIABLE_APPEND_WRITE attributes is set.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 11 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefibootpath: Sanity check for UEFI Boot Path Boot####.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test UEFI Boot Path Boot####.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Enter Setup </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0000 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Intelligent Provisioning </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0001 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0002</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded UEFI Shell </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0002 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0003</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Non bootable Hotkey </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0003 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0004</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded iPXE </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0004 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0005</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Diagnose Error </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0005 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0006</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Boot Menu </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0006 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0007</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Network Boot </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0007 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0008</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: View Integrated Management Log </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0008 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0009</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: View GUI mode Integrated Management Log </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0009 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000A</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: View BIOS Event Log </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000A test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000B</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: HTTP Boot </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000B test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000C</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: PXE Boot </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000C test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000D</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded Diagnostics </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000D test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000E</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Generic USB Boot </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000E test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot000F</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded LOM 1 Port 1 : HPE Ethernet 1Gb 2-port 332i Adapter - NIC (HTTP(S) IPv4) </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot000F test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0010</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded LOM 1 Port 1 : HPE Ethernet 1Gb 2-port 332i Adapter - NIC (PXE IPv4) </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0010 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0011</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded LOM 1 Port 1 : HPE Ethernet 1Gb 2-port 332i Adapter - NIC (HTTP(S) IPv6) </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0011 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0012</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Embedded LOM 1 Port 1 : HPE Ethernet 1Gb 2-port 332i Adapter - NIC (PXE IPv6) </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0012 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0013</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Internal USB 1 : SanDisk Ultra </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0013 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Name: Boot0016</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Info: Windows Boot Manager </PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check bootpath Boot0016 test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>21 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>securebootcert: UEFI secure boot test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: UEFI secure boot test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>The KEK variable check.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> GUID: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Attr: 0x27 (NonVolatile,BootServ,RunTime,TimeBasedAuthenticatedWrite).</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Check Ubuntu master CA certificate presence in KEK</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>No Ubuntu master CA certificate presence in KEK</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>The db variable check.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> GUID: D719B2CB-3D3A-4596-A3BC-DAD00E67656F</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Attr: 0x27 (NonVolatile,BootServ,RunTime,TimeBasedAuthenticatedWrite).</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Check Microsoft UEFI CA certificate presence in db</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MS UEFI CA 2011 key check passed.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>The secure boot variable SecureBoot not found.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>The secure boot variable SetupMode not found.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>The secure boot variable AuditMode not found.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>AuditMode global variable is defined in the UEFI Specification 2.6 for new secure boot architecture. It may because the firmware hasn't been updated to support the UEFI Specification 2.6.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>The secure boot variable DeployedMode not found.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>DeployedMode global variable is defined in the UEFI Specification 2.6 for new secure boot architecture. It may because the firmware hasn't been updated to support the UEFI Specification 2.6.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: UEFI secure boot variable test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>No AuditMode variable found, skip the variable test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 4 warnings, 0 aborted, 1 skipped, 1 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefirtmisc: UEFI miscellaneous runtime service interface tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 4: Test for UEFI miscellaneous runtime service interfaces.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing UEFI runtime service GetNextHighMonotonicCount interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetNextHighMonotonicCount interface test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing UEFI runtime service QueryCapsuleCapabilities interface.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x0: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x10000: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service QueryCapsuleCapabilities interface test with flag value 0x30000 passed.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x50000: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service QueryCapsuleCapabilities interface test with flag value 0x70000 passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 4: Stress test for UEFI miscellaneous runtime service interfaces.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Stress testing for UEFI runtime service GetNextHighMonotonicCount interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetNextHighMonotonicCount interface stress test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Stress testing UEFI runtime service QueryCapsuleCapabilities interface.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x0: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x10000: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service QueryCapsuleCapabilities interface stress test with flag value 0x30000 passed.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Not support the UEFI QueryCapsuleCapabilities runtime interface with flag value 0x50000: cannot test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Firmware also needs to check if the revision of system table is correct or not. Linux kernel returns EFI_UNSUPPORTED as well, if the FirmwareRevision of system table is less than EFI_2_00_SYSTEM_TABLE_REVISION.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service QueryCapsuleCapabilities interface stress test with flag value 0x70000 passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 4: Test GetNextHighMonotonicCount with invalid NULL parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Test with invalid NULL parameter returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 4: Test UEFI miscellaneous runtime services supported status.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Cannot get the RuntimeServicesSupported variable, maybe the runtime service GetVariable is not supported or RuntimeServicesSupported not provided by firmware.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>7 passed, 0 failed, 0 warning, 0 aborted, 7 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefirtvariable: UEFI Runtime service variable interface tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 9: Test UEFI RT service get variable interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetVariable interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 9: Test UEFI RT service get next variable name interface.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>The runtime service GetNextVariableName interface function test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>The runtime service GetNextVariableName interface function test passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Check the GetNextVariableName returned value of VariableNameSize is equal to the length of VariableName.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Check the GetNextVariableName returned value of VariableNameSize is equal to the length of VariableName passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test GetNextVariableName interface returns unique variables.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Test GetNextVariableName interface returns unique variables passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>The GetNextVariableName interface conformance tests.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>The runtime service GetNextVariableName interface conformance tests passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 9: Test UEFI RT service set variable interface.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on two different GUIDs and the same variable name.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on two different GUIDs and the same variable name passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on the same and different variable data.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on the same and different variable data passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on similar variable name.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on similar variable name passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on DataSize is 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on DataSize is 0 passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on Attributes is 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on Attributes is 0 passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on Invalid Attributes.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on Invalid Attributes passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable with both Authenticated Attributes set.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Testing SetVariable with both Authenticated Attributes set passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable with EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS Attributes.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated (UEFI 2.7) and should not be used. Platforms should return EFI_UNSUPPORTED if a caller to SetVariable() specifies this attribute.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Return status: EFI_INVALID_PARAMETER. A parameter was incorrect.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 9: Test UEFI RT service query variable info interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service query variable info interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 9: Test UEFI RT service variable interface stress test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable on getting the variable 1024 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable on getting the variable multiple times passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetNextVariableName on getting the variable multiple times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetNextVariableName on getting the next variable name multiple times passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 9: Test UEFI RT service set variable interface stress test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on setting the variable with the same data 40 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SetVariable on setting the variable with the same data multiple times passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on setting the variable with different data 40 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Testing SetVariable on setting the variable with different data multiple times passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on setting the variable with different name 40 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Testing SetVariable on setting the variable with different name multiple times passed.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing SetVariable on setting the variable with different name and data 40 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Testing SetVariable on setting the variable with different name and data multiple times passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 7 of 9: Test UEFI RT service query variable info interface stress test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing QueryVariableInfo on querying the variable 1024 times.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service query variable info interface stress test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 8 of 9: Test UEFI RT service get variable interface, invalid parameters.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable with NULL variable name.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable with NULL variable name returned error EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable with NULL vendor GUID.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable with NULL vendor GUID returned error EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable with NULL datasize.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable with NULL datasize returned error EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable with NULL data.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable with NULL data returned error EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Testing GetVariable with NULL variable name, vendor GUID, datasize and data.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>GetVariable with NULL variable name, vendor GUID, datasize and data returned error EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 9 of 9: Test UEFI RT variable services supported status.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Cannot get the RuntimeServicesSupported variable, maybe the runtime service GetVariable is not supported or RuntimeServicesSupported not provided by firmware.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>25 passed, 0 failed, 1 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefirttime: UEFI Runtime service time interface tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 36: Test UEFI RT service get time interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTime interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 36: Test UEFI RT service get time interface, NULL time parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 36: Test UEFI RT service get time interface, NULL time and NULL capabilties parameters.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 36: Test UEFI RT service set time interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 36: Test UEFI RT service set time interface, invalid year 1899.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 36: Test UEFI RT service set time interface, invalid year 10000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 7 of 36: Test UEFI RT service set time interface, invalid month 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 8 of 36: Test UEFI RT service set time interface, invalid month 13.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 9 of 36: Test UEFI RT service set time interface, invalid day 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 10 of 36: Test UEFI RT service set time interface, invalid day 32.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 11 of 36: Test UEFI RT service set time interface, invalid hour 24.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 12 of 36: Test UEFI RT service set time interface, invalid minute 60.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 13 of 36: Test UEFI RT service set time interface, invalid second 60.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 14 of 36: Test UEFI RT service set time interface, invalid nanosecond 1000000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 15 of 36: Test UEFI RT service set time interface, invalid timezone -1441.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 16 of 36: Test UEFI RT service set time interface, invalid timezone 1441.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 17 of 36: Test UEFI RT service get wakeup time interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetWakeupTime interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 18 of 36: Test UEFI RT service get wakeup time interface, NULL enabled parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 19 of 36: Test UEFI RT service get wakeup time interface, NULL pending parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 20 of 36: Test UEFI RT service get wakeup time interface, NULL time parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 21 of 36: Test UEFI RT service get wakeup time interface, NULL enabled, pending and time parameters.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service GetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 22 of 36: Test UEFI RT service set wakeup time interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetWakeupTime interface test passed.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 23 of 36: Test UEFI RT service set wakeup time interface, NULL time parameter.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 24 of 36: Test UEFI RT service set wakeup time interface, invalid year 1899.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 25 of 36: Test UEFI RT service set wakeup time interface, invalid year 10000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 26 of 36: Test UEFI RT service set wakeup time interface, invalid month 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 27 of 36: Test UEFI RT service set wakeup time interface, invalid month 13.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 28 of 36: Test UEFI RT service set wakeup time interface, invalid day 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 29 of 36: Test UEFI RT service set wakeup time interface, invalid day 32.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 30 of 36: Test UEFI RT service set wakeup time interface, invalid hour 24.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 31 of 36: Test UEFI RT service set wakeup time interface, invalid minute 60.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 32 of 36: Test UEFI RT service set wakeup time interface, invalid second 60.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 33 of 36: Test UEFI RT service set wakeup time interface, invalid nanosecond 1000000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 34 of 36: Test UEFI RT service set wakeup time interface, invalid timezone -1441.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 35 of 36: Test UEFI RT service set wakeup time interface, invalid timezone 1441.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>UEFI runtime service SetTimeWakeupTime interface test passed, returned EFI_INVALID_PARAMETER as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 36 of 36: Test UEFI RT time services supported status.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Cannot get the RuntimeServicesSupported variable, maybe the runtime service GetVariable is not supported or RuntimeServicesSupported not provided by firmware.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>35 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>csm: UEFI Compatibility Support Module test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: UEFI Compatibility Support Module test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Checking for UEFI Compatibility Support Module (CSM)</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>No CSM: UEFI firmware seems to have no CSM support.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 1 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>maxreadreq: Test firmware has set PCI Express MaxReadReq to a higher value on non-motherboard devices.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test firmware settings MaxReadReq for PCI Express devices.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>MaxReadReq for 0000:01:00.4 is low (128).</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>MaxReadReq for 0000:01:00.1 is low (128).</TD> </TR> <TR> <TD class=style_low>FAILED [LOW]</TD> <TD>2 devices have low MaxReadReq settings. Firmware may have configured these too low.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The MaxReadRequest size is set too low and will affect performance. It will provide excellent bus sharing at the cost of bus data transfer rates. Although not a critical issue, it may be worth considering setting the MaxReadRequest size to 256 or 512 to increase throughput on the PCI Express bus. Some drivers (for example the Brocade Fibre Channel driver) allow one to override the firmware settings. Where possible, this BIOS configuration setting is worth increasing it a little more for better performance at a small reduction of bus sharing.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 1 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>crs: Test PCI host bridge configuration using _CRS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test PCI host bridge configuration using _CRS.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>The kernel has detected a BIOS newer than the end of 2007 (5/22/2021) and has assumed that your BIOS can correctly specify the host bridge MMIO aperture using _CRS. If this does not work correctly you can override this by booting with "pci=nocrs".</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>aspm: PCIe ASPM test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: PCIe ASPM ACPI test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>PCIe ASPM is not controlled by Linux kernel.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>BIOS reports that Linux kernel should not modify ASPM settings that BIOS configured. It can be intentional because hardware vendors identified some capability bugs between the motherboard and the add-on cards.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: PCIe ASPM registers test.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>Device 0000h:01h:00h.04h L0s not enabled.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The ASPM L0s low power Link state is optimized for short entry and exit latencies, while providing substantial power savings. Disabling L0s of a PCIe device may increase power consumption, and will impact the battery life of a mobile system.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>PCIe ASPM setting matched was matched.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>PCIe ASPM setting matched was matched.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>2 passed, 0 failed, 1 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mtd_info: OPAL MTD Info</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test skipped, missing features: devicetree</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dmicheck: DMI/SMBIOS table tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 4: Find and test SMBIOS Table Entry Points.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test tries to find and sanity check the SMBIOS data structures.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Found SMBIOS Table Entry Point at 0x378a0000</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SMBIOS Entry Point Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Anchor String : _SM_</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Checksum : 0x14</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Entry Point Length : 0x1f</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Major Version : 0x03</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Minor Version : 0x02</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Maximum Struct Size : 0x0169</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Entry Point Revision : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Formatted Area : 0x00 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Intermediate Anchor : _DMI_</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Intermediate Checksum : 0x8f</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Structure Table Length : 0x1a21</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Structure Table Address: 0x29607000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> # of SMBIOS Structures : 0x0073</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> SMBIOS BCD Revision : 32</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SMBIOS Table Entry Point Checksum is valid.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SMBIOS Table Entry Point Length is valid.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SMBIOS Table Entry Intermediate Anchor String _DMI_ is valid.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SMBIOS Table Entry Point Intermediate Checksum is valid.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SMBIOS Table Entry Structure Table Address and Length looks valid.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 4: Test DMI/SMBIOS tables for errors.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607000 'System Power Supply (Type 39)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960705c 'Unknown (Type 194)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607063 'Unknown (Type 201)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607075 'BIOS Information (Type 0)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296070a3 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296070be 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296070d9 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296070f4 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960710f 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960712b 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960714e 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960716a 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607184 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960719e 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296071b8 'Port Connector Information (Type 8)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296071d2 'Physical Memory Array (Type 16)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296071eb 'IPMI Device Information (Type 38)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296071ff 'Unknown (Type 193)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607231 'Unknown (Type 195)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607253 'Unknown (Type 198)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607263 'Unknown (Type 215)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960726b 'Unknown (Type 223)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607278 'Unknown (Type 199)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960727e 'Unknown (Type 229)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296072b4 'Unknown (Type 230)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296072da 'Unknown (Type 219)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296072fc 'System Information (Type 1)'</TD> </TR> <TR> <TD class=style_high>FAILED [HIGH]</TD> <TD>Type 17 expects length of 0x54, has incorrect length of 0x5c</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>It may be worth checking against section 7.18 of the System Management BIOS (SMBIOS) Reference Specification (see http://www.dmtf.org/standards/smbios).</TD> </TR> <TR> <TD class=style_high>FAILED [HIGH]</TD> <TD>Type 17 expects length of 0x54, has incorrect length of 0x5c</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>It may be worth checking against section 7.18 of the System Management BIOS (SMBIOS) Reference Specification (see http://www.dmtf.org/standards/smbios).</TD> </TR> <TR> <TD class=style_high>FAILED [HIGH]</TD> <TD>Type 17 expects length of 0x54, has incorrect length of 0x5c</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>It may be worth checking against section 7.18 of the System Management BIOS (SMBIOS) Reference Specification (see http://www.dmtf.org/standards/smbios).</TD> </TR> <TR> <TD class=style_high>FAILED [HIGH]</TD> <TD>Type 17 expects length of 0x54, has incorrect length of 0x5c</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>It may be worth checking against section 7.18 of the System Management BIOS (SMBIOS) Reference Specification (see http://www.dmtf.org/standards/smbios).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960758d 'Memory Array Mapped Address (Type 19)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296075ae 'Memory Array Mapped Address (Type 19)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296075cf 'Unknown (Type 226)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296075f0 'Unknown (Type 221)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960763e 'Unknown (Type 221)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960769b 'Unknown (Type 221)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607748 'Unknown (Type 221)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296078b1 'Cache Information (Type 7)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296078d6 'Cache Information (Type 7)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296078fb 'Cache Information (Type 7)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607920 'Cache Information (Type 7)'</TD> </TR> <TR> <TD class=style_low>FAILED [LOW]</TD> <TD>String index 0x04 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Serial Number', offset 0x20 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The DMI table contains data which is clearly been left in a default setting and not been configured for this machine. Somebody has probably forgotten to define this field and it basically means this field is effectively useless, however the kernel does not use this data so the issue is fairly low.</TD> </TR> <TR> <TD class=style_low>FAILED [LOW]</TD> <TD>String index 0x05 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Asset Tag', offset 0x21 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The DMI table contains data which is clearly been left in a default setting and not been configured for this machine. Somebody has probably forgotten to define this field and it basically means this field is effectively useless, however the kernel does not use this data so the issue is fairly low.</TD> </TR> <TR> <TD class=style_low>FAILED [LOW]</TD> <TD>String index 0x06 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Part Number', offset 0x22 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The DMI table contains data which is clearly been left in a default setting and not been configured for this machine. Somebody has probably forgotten to define this field and it basically means this field is effectively useless, however the kernel does not use this data so the issue is fairly low.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>It may be worth checking against section 7.5 of the System Management BIOS (SMBIOS) Reference Specification (see http://www.dmtf.org/standards/smbios).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296079fe 'Unknown (Type 227)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607a16 'Unknown (Type 227)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607a2e 'Unknown (Type 227)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607a46 'Unknown (Type 227)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607a5e 'Unknown (Type 237)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607a8c 'Unknown (Type 237)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607aba 'Unknown (Type 237)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607ae8 'Unknown (Type 237)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607b16 'Unknown (Type 197)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607b38 'Unknown (Type 232)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607b5e 'Unknown (Type 232)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607b84 'Unknown (Type 232)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607baa 'Unknown (Type 232)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607bd0 'Unknown (Type 211)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607bd9 'TPM Device (Type 43)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607c15 'Chassis Information (Type 3)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607c5b 'OEM Strings (Type 11)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607cc6 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607cfc 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607d3c 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607d7f 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607db8 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607df8 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607e46 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607e7c 'Base Board Information (Type 2)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607eda 'Unknown (Type 243)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607f02 'Unknown (Type 216)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607f2d 'Unknown (Type 224)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607f3b 'Onboard Device (Type 41)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607f5d 'Onboard Device (Type 41)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607f7f 'Onboard Device (Type 41)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607fa7 'Onboard Device (Type 41)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607fc3 'System Slot Information (Type 9)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29607fe4 'System Slot Information (Type 9)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608005 'System Slot Information (Type 9)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608026 'System Slot Information (Type 9)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608047 'System Boot Information (Type 32)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608054 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296080f3 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608192 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960822b 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296082cc 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960834e 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296083d0 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608452 'Unknown (Type 203)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296084ec 'Unknown (Type 234)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296084fe 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608536 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960856f 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296085a7 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296085e0 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608618 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608651 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608689 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296086c2 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296086fa 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608733 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960876b 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296087a4 'Unknown (Type 238)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296087dc 'Unknown (Type 239)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960884c 'Unknown (Type 196)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960885f 'Unknown (Type 233)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960888a 'Unknown (Type 233)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296088b5 'Unknown (Type 202)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296088d9 'Unknown (Type 202)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x296088fd 'Unknown (Type 202)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608921 'Unknown (Type 202)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608945 'Unknown (Type 244)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960895d 'Unknown (Type 240)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960898e 'Group Associations (Type 14)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x2960899c 'Unknown (Type 219)'</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Entry @ 0x29608a1b 'End of Table (Type 127)'</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 4: Test DMI/SMBIOS3 tables for errors.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Cannot find SMBIOS30 table entry, skip the test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 4: Test ARM SBBR SMBIOS structure requirements.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>116 passed, 7 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>microcode: Test if system is using latest microcode.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test for most recent microcode being loaded.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test verifies if the firmware has put a recent revision of the microcode into the processor at boot time. Recent microcode is important to have all the required features and errata updates for the processor.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 7 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 5 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 3 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 1 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 6 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 4 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 2 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not determine if CPU 0 had a microcode update from the kernel message log.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Could not determine from kernel log if latest microcode has been loaded.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>msr: MSR register tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 5: Test CPU generic MSRs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000001 P5_MC_TYPE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000006 MONITOR_FILTER_SIZE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000017 PLATFORM_ID is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000001b APIC_BASE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000003a FEATURE_CONTROL is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000003b TSC_ADJUST is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000008b BIOS_SIGN_ID is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000009b SMM_MONITOR_CTL is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000000fe MTRRCAP is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000179 MCG_CAP is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000017a MCG_STATUS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000019a CLOCK_MODULATION is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000019b THERM_INTERRUPT is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001a0 MISC_ENABLE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001b2 PACKAGE_THERM_INTERRUPT is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f2 SMRR_PHYSBASE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f3 SMRR_PHYSMASK is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000200 MTRR_PHYSBASE0 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000201 MTRR_PHYSMASK0 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000202 MTRR_PHYSBASE1 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000203 MTRR_PHYSMASK1 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000204 MTRR_PHYSBASE2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000205 MTRR_PHYSMASK2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000206 MTRR_PHYSBASE3 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000207 MTRR_PHYSMASK3 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000208 MTRR_PHYSBASE4 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000209 MTRR_PHYSMASK4 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020a MTRR_PHYSBASE5 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020b MTRR_PHYSMASK5 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020c MTRR_PHYSBASE6 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020d MTRR_PHYSMASK6 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020e MTRR_PHYSBASE7 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000020f MTRR_PHYSMASK7 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000210 MTRR_PHYSBASE8 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000211 MTRR_PHYSMASK8 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000212 MTRR_PHYSBASE9 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000213 MTRR_PHYSMASK9 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000250 MTRR_FIX64K_000 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000258 MTRR_FIX16K_800 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000259 MTRR_FIX16K_a00 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000268 MTRR_FIX4K_C000 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000269 MTRR_FIX4K_C800 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026a MTRR_FIX4K_D000 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026b MTRR_FIX4K_D800 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026c MTRR_FIX4K_E000 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026d MTRR_FIX4K_E800 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026e MTRR_FIX4K_F000 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000026f MTRR_FIX4K_F800 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000277 PAT is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000280 MC0_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000281 MC1_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000282 MC2_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000283 MC3_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000284 MC4_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000285 MC5_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000286 MC6_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000287 MC7_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000288 MC8_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000289 MC9_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000028a MC10_CTL2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000002ff MTRR_DEF_TYPE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000003f1 PEBS_ENABLE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000480 VMX_BASIC is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000481 VMX_PINPASED_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000482 VMX_PROCBASED_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000483 VMX_EXIT_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000484 VMX_ENTRY_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000485 VMX_MISC is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000486 VMX_CR0_FIXED0 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000487 VMX_CR0_FIXED1 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000488 VMX_CR4_FIXED0 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000489 VMX_CR4_FIXED1 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048a VMX_VMX_VMCS_ENUM is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048b VMX_PROCBASED_CTLS2 is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048c VMX_EPT_VPID_CAP is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048d VMX_TRUE_PINBASED_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048e VMX_TRUE_PROCBASED_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x0000048f VMX_TRUE_EXIT_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000490 VMX_TRUE_ENTRY_CTLS is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x00000491 VMX_VMFUNC is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0xc0000080 EFER is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0xc0000102 KERNEL_GS_BASE is consistent across 8 CPUs.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 5: Test CPU specific model MSRs.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>No model specific tests for model 0xa7.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 5: Test all P State Ratios.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000000ce Minimum P-State is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000000ce Maximum P-State is consistent across 8 CPUs.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 5: Test C1 and C3 autodemotion.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000000e2 C1 and C3 Autodemotion is consistent across 8 CPUs.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>C1 and C3 Autodemotion disabled.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 5: Test SMRR MSR registers.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f2 SMRR_PHYSBASE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f2 SMRR_TYPE is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f3 SMRR_PHYSMASK is consistent across 8 CPUs.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MSR 0x000001f3 SMRR_VALID is consistent across 8 CPUs.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>89 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>nx: Test if CPU NX is disabled by the BIOS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 3: Test CPU NX capability.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>CPU has NX flags, BIOS is not disabling it.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 3: Test all CPUs have same BIOS set NX flag.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test verifies that all CPUs have the same NX flag setting. Although rare, BIOS may set the NX flag differently per CPU.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>All 8 CPUs have the same NX flag set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 3: Test all CPUs have same msr setting in MSR 0x1a0.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test verifies that all CPUs have the same NX flag setting by examining the per CPU MSR register 0x1a0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>All 8 CPUs have the NX flag in MSR 0x1a0 set.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>3 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>cpufreq: CPU frequency scaling tests.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Cannot set CPU 0 governor to userspace.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Cannot initialize cpufreq to set CPU speed for CPU 0</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 7 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>maxfreq: Test max CPU frequencies against max scaling frequency.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Maximum CPU frequency test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test checks the maximum CPU frequency as detected by the kernel for each CPU against maxiumum frequency as specified by the BIOS frequency scaling settings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>8 CPUs passed the maximum frequency check.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>virt: CPU Virtualisation Configuration test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: CPU Virtualisation Configuration test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Check VT/VMX Virtualization extensions are set up correctly.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Virtualization extensions supported and enabled by BIOS.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pnp: BIOS Support Installation structure test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: PnP BIOS Support Installation structure test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test tries to find and sanity check the Plug and Play BIOS Support Installation Check structure.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not find PnP BIOS Support Installation Check structure. This is not necessarily a failure.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pciirq: PCI IRQ Routing Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: PCI IRQ Routing Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test tries to find and sanity check the PCI IRQ Routing Table, as defined by http://www.microsoft.com/taiwan/whdc/archive/pciirq.mspx and described in pages 233-238 of PCI System Architecture, Fourth Edition, Mindshare, Inc. (1999). NOTE: The PCI IRQ Routing Table only really knows about ISA IRQs and is generally not used with APIC.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Could not find PCI IRQ Routing Table. Since this table is for legacy BIOS systems which don't have ACPI support this is generally not a problem.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mpcheck: MultiProcessor Tables tests.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>The kernel is using the ACPI MADT for SMP configuration information, so the Multiprocessor Tables are not used by the kernel. Any errors in the tables will not affect the operation of Linux unless it is booted with ACPI disabled.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>NOTE: Since ACPI is being used in preference to the Multiprocessor Tables, any errors found in the mpcheck tests will be tagged as LOW errors.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Failed to find the Multiprocessor Table data, skipping mpcheck test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>NOTE: Since the ACPI MADT is being used instead for SMP configuration, this is not a problem.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 9 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>hda_audio: HDA Audio Pin Configuration test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: HDA Audio Pin Configuration test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Cannot find any sound devices in /sys/class/sound.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>ebda: Test EBDA region is mapped and reserved in memory map table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Machine is not using traditional BIOS firmware, skipping test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>bios32: BIOS32 Service Directory test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Machine is not using traditional BIOS firmware, skipping test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>apicedge: APIC edge/level test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Legacy and PCI Interrupt Edge/Level trigger tests.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Legacy interrupts are edge and PCI interrupts are level triggered.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>xenv: XENV Xen Environment Table tests.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI XENV table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>xsdt: XSDT Extended System Description Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: XSDT Extended System Description Table test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in XSDT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>wsmt: WSMT Windows SMM Security Mitigations Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: WSMT Windows SMM Security Mitigations Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>WSMT Windows SMM Security Mitigations Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Protection Flags: 0x00000007</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in WSMT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>wpbt: WPBT Windows Platform Binary Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI WPBT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>wmi: Extract and analyse Windows Management Instrumentation (WMI).</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Windows Management Instrumentation test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SRIO._WDG (1 of 1)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> GUID: 0E7AF9F2-44A1-4C6F-A4B0-A7678480DA61</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> WMI Method:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x02 (Method)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Object ID : AA</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instance : 0x01</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>0E7AF9F2-44A1-4C6F-A4B0-A7678480DA61 has associated method \_SB_.SRIO.WMAA</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>wdat: WDAT Microsoft Hardware Watchdog Action Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI WDAT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>wakealarm: ACPI Wakealarm tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 5: Test existence of RTC with alarm interface.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC with a RTC alarm ioctl() interface found.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 5: Trigger wakealarm for 1 seconds in the future.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Trigger wakealarm for 1 seconds in the future.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC wakealarm was triggered successfully.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 5: Test if wakealarm is fired.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC wakealarm triggered and fired successfully.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 5: Multiple wakealarm firing tests.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Trigger wakealarm for 1 seconds in the future.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Trigger wakealarm for 2 seconds in the future.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Trigger wakealarm for 3 seconds in the future.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Trigger wakealarm for 4 seconds in the future.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC wakealarm triggered and fired successfully.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 5: Reset wakealarm time.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC wakealarm set.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RTC wakealarm reset correctly back to 28/5/2021 00:00:00.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>6 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>waet: WAET Windows ACPI Emulated Devices Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI WAET table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>uefi: UEFI Data Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI UEFI table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>tpm2: TPM2 Trusted Platform Module 2 test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Validate TPM2 table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>TPM2 Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Platform Class: 0x0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address of Control Area: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Start Method: 0x00000006</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in TPM2 table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>tcpa: TCPA Trusted Computing Platform Alliance Capabilities Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI TCPA table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>stao: STAO Status Override Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI STAO table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>srat: SRAT System Resource Affinity Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: SRAT System Resource Affinity Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x02</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x04</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x06</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x03</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x05</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Local APIC/SAPIC Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [7:0] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> APIC ID: 0x07</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Local SAPIC EID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [8:15] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [16:23] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: [23:31] 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Clock Domain 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Memory Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x28</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address: 0x0000000022d08000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x000000005c1f8000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Memory Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x28</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x00000000000a0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Memory Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x28</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address: 0x0000000000100000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x0000000022c08000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SRAT Memory Affinity Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x28</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address: 0x0000000100000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x0000000180000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000000000000000</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in SRAT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>spmi: SPMI Service Processor Management Interface Description Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: SPMI Service Processor Management Interface Description Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SPMI Service Processor Management Interface Description Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Interface Type: 0x01 (Keyboard Controller Type (KCS))</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Specification Revision: 0x0200</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Interrupt Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> GPE: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Device Flag: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Global System Interrupt 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width 0x08</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address 0x0000000000000ca3</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Segment Group: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Bus: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Device: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Function: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in SPMI table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>spcr: SPCR Serial Port Console Redirection Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 3: SPCR Serial Port Console Redirection Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Serial Interface: 16550 compatible</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Baud Rate: 115200</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Terminal Type: VT100+</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in SPCR table.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 3: SPCR Revision Test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 3: SPCR GSIV Interrupt Test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>slit: SLIT System Locality Distance Information test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: SLIT System Locality Distance Information test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>SLIT System Locality Distance Information Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of Localities: 0x0000000000000001</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in SLIT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>slic: SLIC Software Licensing Description Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI SLIC table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>sdev: SDEV Secure Devices Table test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI SDEV table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>sdei: SDEI Software Delegated Exception Interface Table test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI SDEI table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>sbst: SBST Smart Battery Specification Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI SBST table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>rsdt: RSDT Root System Description Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: RSDT Root System Description Table test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in RSDT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>rsdp: RSDP Root System Description Pointer test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: RSDP Root System Description Pointer test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP first checksum is correct</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: oem_id contains only printable characters.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: revision is 2.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: at least one of RsdtAddress or XsdtAddress is non-zero.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>NOTE: The RSDT and XSDT are both defined. An operating system supporting ACPI 1.0 should use the RSDT, otherwise it will use the XSDT. RSDT = 0x2129555652, XSDT = 0x2129555848</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: the correct RSDT/XSDT address is being used.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: the table is the correct length.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP second checksum is correct</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>RSDP: the reserved field is zero.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>8 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>rasf: RASF RAS Feature Table test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI RASF table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pptt: PPTT Processor Properties Topology Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI PPTT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pmtt: PMTT Memory Topology Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI PMTT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pdtt: PDTT Platform Debug Trigger Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI PDTT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pcct: PCCT Platform Communications Channel test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Validate PCC table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>PCC Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000000000000000</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in PCC table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>pcc: Processor Clocking Control (PCC) test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Processor Clocking Control (PCC) test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test checks the sanity of the Processor Clocking Control as found on some HP ProLiant machines. Most computers do not use this interface to control the CPU clock frequency, so this test will be skipped.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This machine does not use Processor Clocking Control (PCC).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 1 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>osilinux: Disassemble DSDT to check for _OSI("Linux").</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Disassemble DSDT to check for _OSI("Linux").</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This is not strictly a failure mode, it just alerts one that this has been defined in the DSDT and probably should be avoided since the Linux ACPI driver matches onto the Windows _OSI strings</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>DSDT does not implement a deprecated _OSI("Linux") test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>nfit: NFIT NVDIMM Firmware Interface Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI NFIT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>method: ACPI DSDT Method Semantic tests.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT Preferred PM profile indicates this is not a Mobile Platform.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 203: Test Method Names.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Found 846 Objects</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Method names contain legal characters.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 203: Test _AEI.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AEI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 203: Test _EVT (Event Method).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EVT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 203: Test _DLM (Device Lock Mutex).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DLM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 203: Test _PIC (Inform AML of Interrupt Model).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_PIC returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_PIC returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_PIC returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 203: Test _CID (Compatible ID).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._CID returned a string 'MSFT0101' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._CID returned an integer 0x030ad041 (EISA ID PNP0A03).</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 7 of 203: Test _CLS (Class Code).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CLS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 8 of 203: Test _DDN (DOS Device Name).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR1._DDN correctly returned a string.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR2._DDN correctly returned a string.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 9 of 203: Test _HID (Hardware ID).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.WERR._HID returned an integer 0x330cd041 (EISA ID PNP0C33).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SRIO._HID returned a string 'PNP0C14' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0._HID returned a string 'ACPI0004' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._HID returned a string 'STM7364' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._HID returned an integer 0x080ad041 (EISA ID PNP0A08).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.APIC._HID returned an integer 0x0300d041 (EISA ID PNP0003).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._HID returned an integer 0x0f0cd041 (EISA ID PNP0C0F).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.DMAC._HID returned an integer 0x0002d041 (EISA ID PNP0200).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.RTC_._HID returned an integer 0x000bd041 (EISA ID PNP0B00).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.PIC_._HID returned an integer 0x0000d041 (EISA ID PNP0000).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.FPU_._HID returned an integer 0x040cd041 (EISA ID PNP0C04).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TMR_._HID returned an integer 0x0001d041 (EISA ID PNP0100).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.SPKR._HID returned an integer 0x0008d041 (EISA ID PNP0800).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.HPET._HID returned an integer 0x0301d041 (EISA ID PNP0103).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.XTRA._HID returned an integer 0x020cd041 (EISA ID PNP0C02).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._HID returned an integer 0x01000926 (EISA ID IPI0001).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR1._HID returned an integer 0x0105d041 (EISA ID PNP0501).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR2._HID returned an integer 0x0105d041 (EISA ID PNP0501).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._HID returned a string 'ACPI000E' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._HID returned a string 'ACPI000D' as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 10 of 203: Test _HRV (Hardware Revision Number).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _HRV.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 11 of 203: Test _MLS (Multiple Language String).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MLS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 12 of 203: Test _PLD (Physical Device Location).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS01._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS02._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS03._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS04._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS05._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS06._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS07._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS08._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS09._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS10._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS11._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS12._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS13._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS14._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS15._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS16._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS17._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS18._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS19._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS20._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS21._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS22._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS23._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS24._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS25._PLD correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS26._PLD correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 13 of 203: Test _SUB (Subsystem ID).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SUB.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 14 of 203: Test _SUN (Slot User Number).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT0._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT1._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT2._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT3._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT4._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT5._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT6._SUN correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT7._SUN correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 15 of 203: Test _STR (String).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._STR correctly returned a buffer of 30 elements.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._STR correctly returned a buffer of 18 elements.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 16 of 203: Test _UID (Unique ID).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.WERR._UID correctly returned sane looking value 0x00000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SRIO._UID correctly returned sane looking value 0x00000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0._UID correctly returned sane looking value 0x00000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MHP0._UID returned a string '00-00' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MHP1._UID returned a string '00-01' as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._UID correctly returned sane looking value 0x00000001.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._UID correctly returned sane looking value 0x00000002.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._UID correctly returned sane looking value 0x00000003.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._UID correctly returned sane looking value 0x00000004.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._UID correctly returned sane looking value 0x00000005.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._UID correctly returned sane looking value 0x00000006.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._UID correctly returned sane looking value 0x00000007.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._UID correctly returned sane looking value 0x00000008.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._UID correctly returned sane looking value 0x00000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR1._UID correctly returned sane looking value 0x00000001.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR2._UID correctly returned sane looking value 0x00000002.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._UID correctly returned sane looking value 0x00000000.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 17 of 203: Test _CDM (Clock Domain).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CDM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 18 of 203: Test _CRS (Current Resource Settings).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._CRS (32-bit Fixed Location Memory Range Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.APIC._CRS (32-bit Fixed Location Memory Range Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._CRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.DMAC._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.RTC_._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.PIC_._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.FPU_._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TMR_._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.SPKR._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.HPET._CRS (32-bit Fixed Location Memory Range Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.XTRA._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR1._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR2._CRS (I/O Port Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._CRS (WORD Address Space Descriptor) looks sane.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 19 of 203: Test _DSD (Device Specific Data).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DSD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 20 of 203: Test _DIS (Disable).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._DIS returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._DIS returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 21 of 203: Test _DMA (Direct Memory Access).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DMA.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 22 of 203: Test _FIX (Fixed Register Resource Provider).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FIX.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 23 of 203: Test _GSB (Global System Interrupt Base).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GSB.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 24 of 203: Test _HPP (Hot Plug Parameters).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _HPP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 25 of 203: Test _MAT (Multiple APIC Table Entry).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MAT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 26 of 203: Test _PRS (Possible Resource Settings).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._PRS (32-bit Fixed Location Memory Range Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._PRS (IRQ Descriptor) looks sane.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 27 of 203: Test _PRT (PCI Routing Table).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._PRT correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0C._PRT correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0B._PRT correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01._PRT correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 28 of 203: Test _PXM (Proximity).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C000._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C001._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C002._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C003._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C004._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C005._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C006._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C007._PXM correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._PXM correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 29 of 203: Test _SLI (System Locality Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SLI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 30 of 203: Test _CCA (Cache Coherency Attribute).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._CCA correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 31 of 203: Test _EDL (Eject Device List).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EDL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 32 of 203: Test _EJD (Ejection Dependent Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 33 of 203: Test _EJ0 (Eject).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJ0.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 34 of 203: Test _EJ1 (Eject).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJ1.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 35 of 203: Test _EJ2 (Eject).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJ2.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 36 of 203: Test _EJ3 (Eject).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJ3.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 37 of 203: Test _EJ4 (Eject).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EJ4.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 38 of 203: Test _LCK (Lock).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _LCK.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 39 of 203: Test _RMV (Remove).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _RMV.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 40 of 203: Test _STA (Status).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.WERR._STA correctly returned sane looking value 0x00000000.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SRIO._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C000._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C001._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C002._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C003._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C004._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C005._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C006._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C007._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.TPM_._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKA._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKB._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKC._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKD._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKE._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKF._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKG._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.LNKH._STA correctly returned sane looking value 0x0000000b.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.HPET._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR1._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.UAR2._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._STA correctly returned sane looking value 0x0000000f.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 41 of 203: Test _DEP (Operational Region Dependencies).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DEP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 42 of 203: Test _FIT (Firmware Interface Table).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FIT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 43 of 203: Test _BDN (BIOS Dock Name).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BDN.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 44 of 203: Test _BBN (Base Bus Number).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._BBN correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 45 of 203: Test _DCK (Dock).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _DCK.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 46 of 203: Test _INI (Initialize).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_._INI returned no values as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._INI returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 47 of 203: Test _GLK (Global Lock).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GLK.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 48 of 203: Test _SEG (Segment).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._SEG correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 49 of 203: Test _LSI (Label Storage Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _LSI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 50 of 203: Test _OFF (Set resource off).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _OFF.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 51 of 203: Test _ON_ (Set resource on).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ON_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 52 of 203: Test _DSW (Device Sleep Wake).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DSW.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 53 of 203: Test _IRC (In Rush Current).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _IRC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 54 of 203: Test _PRE (Power Resources for Enumeration).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PRE.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 55 of 203: Test _PR0 (Power Resources for D0).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PR0.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 56 of 203: Test _PR1 (Power Resources for D1).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PR1.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 57 of 203: Test _PR2 (Power Resources for D2).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PR2.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 58 of 203: Test _PR3 (Power Resources for D3).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PR3.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 59 of 203: Test _PRW (Power Resources for Wake).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0C._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0B._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE01._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE05._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE09._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0L._PRW correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01._PRW correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 60 of 203: Test _PS0 (Power State 0).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._PS0 returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 61 of 203: Test _PS1 (Power State 1).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PS1.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 62 of 203: Test _PS2 (Power State 2).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PS2.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 63 of 203: Test _PS3 (Power State 3).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._PS3 returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 64 of 203: Test _PSC (Power State Current).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 65 of 203: Test _PSE (Power State for Enumeration).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSE.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 66 of 203: Test _PSW (Power State Wake).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSW.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 67 of 203: Test _S1D (S1 Device State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S1D.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 68 of 203: Test _S2D (S2 Device State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S2D.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 69 of 203: Test _S3D (S3 Device State).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._S3D correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 70 of 203: Test _S4D (S4 Device State).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._S4D correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 71 of 203: Test _S0W (S0 Device Wake State).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._S0W correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 72 of 203: Test _S1W (S1 Device Wake State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S1W.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 73 of 203: Test _S2W (S2 Device Wake State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S2W.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 74 of 203: Test _S3W (S3 Device Wake State).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._S3W correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 75 of 203: Test _S4W (S4 Device Wake State).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._S4W correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 76 of 203: Test _RST (Device Reset).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _RST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 77 of 203: Test _PRR (Power Resource for Reset).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PRR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 78 of 203: Test _S0_ (S0 System State).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>\_S0_ PM1a_CNT.SLP_TYP value: 0x00000000</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>\_S0_ PM1b_CNT.SLP_TYP value: 0x00000000</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_S0_ correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 79 of 203: Test _S1_ (S1 System State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S1_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 80 of 203: Test _S2_ (S2 System State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S2_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 81 of 203: Test _S3_ (S3 System State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S3_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 82 of 203: Test _S4_ (S4 System State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _S4_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 83 of 203: Test _S5_ (S5 System State).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>\_S5_ PM1a_CNT.SLP_TYP value: 0x00000007</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>\_S5_ PM1b_CNT.SLP_TYP value: 0x00000000</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_S5_ correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 84 of 203: Test _SWS (System Wake Source).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SWS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 85 of 203: Test _PSS (Performance Supported States).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 86 of 203: Test _CPC (Continuous Performance Control).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CPC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 87 of 203: Test _CSD (C State Dependencies).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CSD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 88 of 203: Test _CST (C States).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 89 of 203: Test _PCT (Performance Control).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PCT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 90 of 203: Test _PDL (P-State Depth Limit).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PDL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 91 of 203: Test _PPC (Performance Present Capabilities).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PPC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 92 of 203: Test _PPE (Polling for Platform Error).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PPE.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 93 of 203: Test _PSD (Power State Dependencies).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 94 of 203: Test _PTC (Processor Throttling Control).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C000._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C001._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C002._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C003._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C004._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C005._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C006._PTC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C007._PTC correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 95 of 203: Test _TDL (T-State Depth Limit).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TDL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 96 of 203: Test _TPC (Throttling Present Capabilities).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C000._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C001._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C002._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C003._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C004._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C005._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C006._TPC correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C007._TPC correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 97 of 203: Test _TSD (Throttling State Dependencies).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TSD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 98 of 203: Test _TSS (Throttling Supported States).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C000._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C000._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C001._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C001._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C002._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C002._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C003._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C003._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C004._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C004._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C005._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C005._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C006._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C006._TSS correctly returned a sane looking package.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>\_SB_.SCK0.C007._TSS values:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>T-State CPU Power Latency Control Status</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Freq (mW) (usecs)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> 0 100% 13576 0 00 00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.SCK0.C007._TSS correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 99 of 203: Test _LPI (Low Power Idle States).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _LPI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 100 of 203: Test _RDI (Resource Dependencies for Idle).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _RDI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 101 of 203: Test _PUR (Processor Utilization Request).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PUR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 102 of 203: Test _MSG (Message).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MSG.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 103 of 203: Test _SST (System Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 104 of 203: Test _ALC (Ambient Light Colour Chromaticity).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ALC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 105 of 203: Test _ALI (Ambient Light Illuminance).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ALI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 106 of 203: Test _ALT (Ambient Light Temperature).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ALT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 107 of 203: Test _ALP (Ambient Light Polling).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ALP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 108 of 203: Test _ALR (Ambient Light Response).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ALR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 109 of 203: Test _LID (Lid Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _LID.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 110 of 203: Test _GTF (Get Task File).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GTF.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 111 of 203: Test _GTM (Get Timing Mode).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GTM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 112 of 203: Test _MBM (Memory Bandwidth Monitoring Data).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MBM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 113 of 203: Test _UPC (USB Port Capabilities).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS01._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS02._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS03._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS04._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS05._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS06._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS07._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS08._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS09._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS10._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS11._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS12._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS13._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS14._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS15._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS16._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS17._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS18._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS19._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS20._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS21._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS22._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS23._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS24._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS25._UPC correctly returned a sane looking package.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS26._UPC correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 114 of 203: Test _UPD (User Presence Detect).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _UPD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 115 of 203: Test _UPP (User Presence Polling).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _UPP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 116 of 203: Test _GCP (Get Capabilities).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._GCP correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 117 of 203: Test _GRT (Get Real Time).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._GRT correctly returned a sane looking buffer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 118 of 203: Test _GWS (Get Wake Status).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._GWS correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 119 of 203: Test _CWS (Clear Wake Status).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._CWS correctly returned sane looking value 0x00000001.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._CWS correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 120 of 203: Test _SRT (Set Real Time).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._SRT correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 121 of 203: Test _STP (Set Expired Timer Wake Policy).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._STP correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 122 of 203: Test _STV (Set Timer Value).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._STV correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 123 of 203: Test _TIP (Expired Timer Wake Policy).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._TIP correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 124 of 203: Test _TIV (Timer Values).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.TIME._TIV correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 125 of 203: Test _NBS (NVDIMM Boot Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NBS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 126 of 203: Test _NCH (NVDIMM Current Health Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NCH.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 127 of 203: Test _NIC (NVDIMM Health Error Injection Capabilities).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NIC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 128 of 203: Test _NIH (NVDIMM Inject/Clear Health Errors).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NIH.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 129 of 203: Test _NIG (NVDIMM Inject Health Error Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NIG.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 130 of 203: Test _SBS (Smart Battery Subsystem).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _SBS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 131 of 203: Test _BCT (Battery Charge Time).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BCT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 132 of 203: Test _BIF (Battery Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BIF.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 133 of 203: Test _BIX (Battery Information Extended).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BIX.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 134 of 203: Test _BMA (Battery Measurement Averaging).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BMA.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 135 of 203: Test _BMC (Battery Maintenance Control).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BMC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 136 of 203: Test _BMD (Battery Maintenance Data).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BMD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 137 of 203: Test _BMS (Battery Measurement Sampling Time).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BMS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 138 of 203: Test _BST (Battery Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 139 of 203: Test _BTP (Battery Trip Point).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BTP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 140 of 203: Test _BTH (Battery Throttle Limit).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _BTH.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 141 of 203: Test _BTM (Battery Time).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _BTM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 142 of 203: Test _PCL (Power Consumer List).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Machine is not a mobile platform, skipping test for non-existent mobile platform related object _PCL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 143 of 203: Test _PIF (Power Source Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PIF.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 144 of 203: Test _PRL (Power Source Redundancy List).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PRL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 145 of 203: Test _PSR (Power Source).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 146 of 203: Test _GAI (Get Averaging Level).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._GAI correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 147 of 203: Test _GHL (Get Harware Limit).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._GHL correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 148 of 203: Test _PMC (Power Meter Capabilities).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._PMC correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 149 of 203: Test _PMD (Power Meter Devices).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._PMD returned a sane package of 1 references.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 150 of 203: Test _PMM (Power Meter Measurement).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PMI0._PMM correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 151 of 203: Test _WPC (Wireless Power Calibration).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _WPC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 152 of 203: Test _WPP (Wireless Power Polling).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _WPP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 153 of 203: Test _FIF (Fan Information).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FIF.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 154 of 203: Test _FPS (Fan Performance States).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FPS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 155 of 203: Test _FSL (Fan Set Level).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FSL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 156 of 203: Test _FST (Fan Status).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _FST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 157 of 203: Test _ACx (Active Cooling).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC0.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC1.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC2.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC3.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC4.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC5.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC6.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC7.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC8.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AC9.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 158 of 203: Test _ART (Active Cooling Relationship Table).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ART.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 159 of 203: Test _ALx (Active List).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL0.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL1.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL2.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL3.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL4.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL5.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL6.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL7.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL8.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _AL9.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 160 of 203: Test _CRT (Critical Trip Point).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CRT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 161 of 203: Test _CR3 (Warm/Standby Temperature).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CR3.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 162 of 203: Test _DTI (Device Temperature Indication).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DTI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 163 of 203: Test _HOT (Hot Temperature).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _HOT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 164 of 203: Test _MTL (Minimum Throttle Limit).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MTL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 165 of 203: Test _NTT (Notification Temp Threshold).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _NTT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 166 of 203: Test _PSL (Passive List).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 167 of 203: Test _PSV (Passive Temp).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PSV.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 168 of 203: Test _RTV (Relative Temp Values).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _RTV.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 169 of 203: Test _SCP (Set Cooling Policy).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DTI.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 170 of 203: Test _TC1 (Thermal Constant 1).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TC1.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 171 of 203: Test _TC2 (Thermal Constant 2).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TC2.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 172 of 203: Test _TFP (Thermal fast Sampling Period).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TFP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 173 of 203: Test _TMP (Thermal Zone Current Temp).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TMP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 174 of 203: Test _TPT (Trip Point Temperature).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TPT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 175 of 203: Test _TRT (Thermal Relationship Table).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TRT.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 176 of 203: Test _TSN (Thermal Sensor Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TSN.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 177 of 203: Test _TSP (Thermal Sampling Period).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TSP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 178 of 203: Test _TST (Temperature Sensor Threshold).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TST.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 179 of 203: Test _TZD (Thermal Zone Devices).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TZD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 180 of 203: Test _TZM (Thermal Zone member).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TZM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 181 of 203: Test _TZP (Thermal Zone Polling).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _TZP.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 182 of 203: Test _GPE (General Purpose Events).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GPE.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 183 of 203: Test _EC_ (EC Offset Query).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _EC_.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 184 of 203: Test _PTS (Prepare to Sleep).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test _PTS(5).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_PTS returned no values as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 185 of 203: Test _TTS (Transition to State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Optional control method _TTS does not exist.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 186 of 203: Test _WAK (System Wake).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test _WAK(5) System Wake, State S5.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_WAK correctly returned a sane looking package.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 187 of 203: Test _ADR (Return Unique ID for Device).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MHP0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MHP1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.DMI0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0A._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0B._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0C._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0D._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0E._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0F._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0G._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CB0H._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IIM0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.ALZA._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.DISP._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IHC1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IHC2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IIDR._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IMKT._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IHC3._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MRO0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MRO1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT3._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT4._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT2.PRT5._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS01._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS02._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS03._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS04._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS05._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS06._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS07._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS08._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS09._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS10._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS11._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS12._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS13._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS14._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS15._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.HS16._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS17._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS18._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS19._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS20._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS21._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS22._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS23._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS24._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS25._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.XHCI.RHUB.SS26._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.OTG0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CAMR._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.NTHP._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.HEC1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.HEC2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.IDER._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.MEKT._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.HEC3._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT3._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT4._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SAT1.PRT5._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.NAN1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PMC1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.CAVS._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SMBS._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.SPIC._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.GBE1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.NTPK._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0C._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0B._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0B.EMB1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0B.EMB2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE01._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE02._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE03._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE04._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE05._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE06._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE07._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE08._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE09._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0A._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0D._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0E._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0F._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0G._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0H._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0I._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0J._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0K._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0L._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0M._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0N._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.PE0O._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT0._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT1._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT2._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT3._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT4._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT5._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT6._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR01.SLT7._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR02._ADR correctly returned an integer.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.BR03._ADR correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 188 of 203: Test _BCL (Query List of Brightness Control Levels Supported).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _BCL.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 189 of 203: Test _BCM (Set Brightness Level).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _BCM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 190 of 203: Test _BQC (Brightness Query Current Level).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _BQC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 191 of 203: Test _DCS (Return the Status of Output Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DCS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 192 of 203: Test _DDC (Return the EDID for this Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DDC.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 193 of 203: Test _DSS (Device Set State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DSS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 194 of 203: Test _DGS (Query Graphics State).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DGS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 195 of 203: Test _DOD (Enumerate All Devices Attached to Display Adapter).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DOD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 196 of 203: Test _DOS (Enable/Disable Output Switching).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DOS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 197 of 203: Test _GPD (Get POST Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _GPD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 198 of 203: Test _ROM (Get ROM Data).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ROM.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 199 of 203: Test _SPD (Set POST Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SPD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 200 of 203: Test _VPO (Video POST Options).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _VPO.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 201 of 203: Test _CBA (Configuration Base Address).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00._CBA correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 202 of 203: Test _IFT (IPMI Interface Type).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._IFT correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 203 of 203: Test _SRV (IPMI Interface Revision).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>\_SB_.PC00.LPC0.KCS_._SRV correctly returned an integer.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>373 passed, 0 failed, 0 warning, 0 aborted, 168 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>msdm: MSDM Microsoft Data Management Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI MSDM table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>msct: MSCT Maximum System Characteristics Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: MSCT Maximum System Characteristics Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>MSCT Max System Characteristics Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Offset: 0x00000038</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max Proximity Domains: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max Clock Domains: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max Physical Address: 0x00003fffffffffff</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Proximity Domain 00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Revision: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x16</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Domain Range (low): 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Domain Range (high): 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max Processor Capacity: 0x00000008</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max Memory Capacity: 0x00003fffffffffff</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in MSCT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mpst: MPST Memory Power State Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI MPST table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mchi: MCHI Management Controller Host Interface Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI MCHI table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>mcfg: MCFG PCI Express* memory mapped config space test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: Validate MCFG table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test tries to validate the MCFG table by comparing the first 16 bytes in the MMIO mapped config space with the 'traditional' config space of the first PCI device (root bridge). The MCFG data is only trusted if it is marked reserved in the UEFI run-time service memory map</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Memory Map Layout</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>-----------------</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000000000000 - 0x000000000008ffff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000000090000 - 0x0000000000093fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000000094000 - 0x000000000009efff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000000009f000 - 0x00000000000fffff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000000100000 - 0x0000000027959fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000002795a000 - 0x000000002795afff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000002795b000 - 0x0000000029606fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000029607000 - 0x0000000029608fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000029609000 - 0x00000000354bcfff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000354bd000 - 0x0000000035569fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003556a000 - 0x0000000035601fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000035602000 - 0x0000000035603fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000035604000 - 0x0000000035617fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000035618000 - 0x0000000035619fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003561a000 - 0x0000000035e93fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000035e94000 - 0x0000000035e94fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000035e95000 - 0x000000003789ffff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000378a0000 - 0x00000000378a0fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000378a1000 - 0x00000000378bcfff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000378bd000 - 0x000000003790efff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003790f000 - 0x0000000037ad6fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000037ad7000 - 0x0000000037ad7fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000037ad8000 - 0x0000000037b27fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000037b28000 - 0x0000000037b28fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000037b29000 - 0x0000000037b7efff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000037b7f000 - 0x0000000039110fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000039111000 - 0x000000003913efff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003913f000 - 0x000000003915cfff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003915d000 - 0x0000000039161fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000039162000 - 0x0000000039166fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000039167000 - 0x0000000039169fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003916a000 - 0x000000003916afff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000003916b000 - 0x0000000077065fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000077066000 - 0x0000000077067fff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000077068000 - 0x000000007c506fff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000007c507000 - 0x000000007eb7efff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000007eb7f000 - 0x000000007ec7efff (ACPI Non-volatile Storage)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000007ec7f000 - 0x000000007eefefff (ACPI Non-volatile Storage)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000007eeff000 - 0x000000007eefffff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x000000007ef00000 - 0x000000007fffffff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000e0000000 - 0x00000000efffffff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x00000000fed20000 - 0x00000000fed7ffff (Reserved)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>0x0000000100000000 - 0x000000027fffffff (System RAM)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>MCFG table found, size is 16 bytes (excluding header) (1 entries).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Configuration Entry #0:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Base Address : 0xe0000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Segment : 0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Start bus : 0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> End bus : 255</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MCFG MMIO config space is reserved in memory map table.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: Validate MCFG PCI config space.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>PCI config space verified.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>2 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>madt: MADT Multiple APIC Description Table (spec compliant).</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 5: MADT checksum test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT checksum is correct</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 5: MADT revision test.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Most recent FADT revision is 6.2.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Most recent MADT revision is 4.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT revision 3 is defined.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>MADT revision is not in sync with the FADT revision; MADT 3 expects FADT 6.0 but found 6.1 instead.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 5: MADT architecture minimum revision test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT revision 3 meets the minimum needed (1) for the intel architecture.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 5: MADT flags field reserved bits test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT flags reserved bits are not set.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 5: MADT subtable tests.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT revision 3 is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 1 (offset 0x2c) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 2 (offset 0x34) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 2.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 3 (offset 0x3c) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 4.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 4 (offset 0x44) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 6.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 5 (offset 0x4c) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 1.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 6 (offset 0x54) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 3.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 7 (offset 0x5c) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 5.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 0 (Processor Local APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 8 (offset 0x64) of type 0 (Processor Local APIC) is the correct length: 8</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPIC has matching processor UID 7.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Processor Local APIC flags field, bits 1..31 are reserved and properly set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 1 (I/O APIC) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 9 (offset 0x6c) of type 1 (I/O APIC) is the correct length: 12</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT I/O APIC flags are reserved, and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT I/O APIC address in non-zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 2 (Interrupt Source Override) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 10 (offset 0x78) of type 2 (Interrupt Source Override) is the correct length: 10</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Interrupt Source Override Bus is 0 for ISA bus.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Interrupt Source Override flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 2 (Interrupt Source Override) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 11 (offset 0x82) of type 2 (Interrupt Source Override) is the correct length: 10</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Interrupt Source Override Bus is 0 for ISA bus.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Interrupt Source Override flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 12 (offset 0x8c) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 13 (offset 0x92) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 1.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 14 (offset 0x98) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 2.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 15 (offset 0x9e) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 3.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 16 (offset 0xa4) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 4.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 17 (offset 0xaa) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 5.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 18 (offset 0xb0) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 6.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT subtable type 4 (Local APIC NMI) is defined.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Subtable 19 (offset 0xb6) of type 4 (Local APIC NMI) is the correct length: 6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT LAPICNMI has matching processor UID 7.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>MADT Local APIC NMI flags, bits 4..31 are reserved and set to zero.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>81 passed, 1 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>lpit: LPIT Low Power Idle Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI LPIT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>iort: IORT IO Remapping Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI IORT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>hmat: HMAT Heterogeneous Memory Attribute Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Validate HMAT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>HMAT Heterogeneous Memory Attribute Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> System Locality Latency and Bandwidth Information (Type 1):</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x00000024</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Data Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of Initiator PDs: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of Target PDs: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Entry Base Unit: 0x0000000000000064</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> System Locality Latency and Bandwidth Information (Type 1):</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x00000024</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Data Type: 0x03</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of Initiator PDs: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of Target PDs: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Entry Base Unit: 0x000000000000000a</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in HMAT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>hpet: HPET IA-PC High Precision Event Timer Table tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 4: Test HPET base in kernel log.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test checks the HPET PCI BAR for each timer block in the timer. The base address is passed by the firmware via an ACPI table. IRQ routing and initialization is also verified by the test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Found HPET base 0xfed00000 in kernel log.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 4: Test HPET base in HPET table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Hardware ID of Event Block:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> PCI Vendor ID : 0x8086</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Legacy IRQ Routing Capable : 1</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> COUNT_SIZE_CAP counter size: 1</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Number of comparitors : 7</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Hardwre Revision ID : 0x1</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Lower 32 bit base Address : 0xfed00000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x40</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Width : 0x0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>HPET sequence number : 0x0</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Minimum clock tick : 0x80</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Page Protection : 0x0 (No guaranteed protection)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>OEM attributes : 0x0</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>HPET looks sane.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 4: Test HPET base in DSDT and/or SSDT.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>HPET base matches that between SSDT and the kernel (0xfed00000).</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 4: Test HPET configuration.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Vendor ID looks sane: 0x8086.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Valid clock period 41666667.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>5 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>hest: HEST Hardware Error Source Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: HEST Hardware Error Source Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>HEST Hardware Error Source Table test</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Source Count: 0x00000002</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>HEST Generic Hardware Error Source</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x0009</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Source ID: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Related Source ID: 0xffff</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Enabled: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Num. Records. Prealloc.: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max. Sections Per Rec.: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max. Raw Data Length: 0x00001000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Status Address:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width 0x40</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size 0x04</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address 0x000000007eb39018</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Hardware Error Notification:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x03</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x1c</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Config. Write. Enable: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Poll Interval: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Interrupt Vector: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Sw. to Polling Value: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Sw. to Polling Window: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error: Thresh. Value: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error: Thresh. Window: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Status Blk. Length: 0x00001000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>HEST Generic Hardware Error Source</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x0009</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Source ID: 0x0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Related Source ID: 0xffff</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Enabled: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Num. Records. Prealloc.: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max. Sections Per Rec.: 0x00000001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Max. Raw Data Length: 0x00001000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Status Address:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width 0x40</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size 0x04</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address 0x000000007eb3a020</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Hardware Error Notification:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Type: 0x04</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x1c</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Config. Write. Enable: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Poll Interval: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Interrupt Vector: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Sw. to Polling Value: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Sw. to Polling Window: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error: Thresh. Value: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error: Thresh. Window: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Status Blk. Length: 0x00001000</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in HEST table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>gtdt: GTDT Generic Timer Description Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI GTDT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>fpdt: FPDT Firmware Performance Data Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: FPDT Firmware Performance Data Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Firmware Basic Boot Performance Pointer Record:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Perf Rec Type: 0x0000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Rec Length: 0x10</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Revision: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> FBPT Pointer: 0x000000007ea1f000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Note: currently fwts does not check FBPT validity and the associated data</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in FPDT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>fan: Simple fan tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: Test fan status.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test how many fans there are in the system. Check for the current status of the fan(s).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device1 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device6 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device4 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device2 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device0 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device7 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device5 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Fan cooling_device3 of type Processor has max cooling state 3 and current cooling state 0.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: Load system, check CPU fan status.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test how many fans there are in the system. Check for the current status of the fan(s).</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Loading CPUs for 20 seconds to try and get fan speeds to change.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device1 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device6 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device4 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device2 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device0 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device7 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device5 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Fan cooling_device3 current state did not change from value 0 while CPUs were busy.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Did not detect any change in the CPU related thermal cooling device states. It could be that the devices are returning static information back to the driver and/or the fan speed is automatically being controlled by firmware using System Management Mode in which case the kernel interfaces being examined may not work anyway.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>8 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>fadt: FADT Fixed ACPI Description Table tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 6: ACPI FADT Description Table flag info.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT: flag states</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> WBINVD is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> WBINVD_FLUSH is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PROC_C1 is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> P_LVL2_UP is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PWR_BUTTON is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> SLP_BUTTON is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> FIX_RTC is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> RTC_S4 is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> TMR_VAL_EXT is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> DCK_CAP is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> RESET_REG_SUP is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> SEALED_CASE is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> HEADLESS is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> CPU_SW_SLP is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PCI_EXP_WAK is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> USE_PLATFORM_CLOCK is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> S4_RTC_STS_VALID is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> REMOTE_POWER_ON_CAPABLE is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> FORCE_APIC_CLUSTER_MODEL is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> FORCE_APIC_PHYSICAL_DESTINATION_MODE is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> HW_REDUCED_ACPI is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> LOW_POWER_S0_IDLE_CAPABLE is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT: IA-PC Boot Architecture flag states</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> LEGACY_DEVICES is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> 8042 is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> VGA_NOT_PRESENT is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> MSI_NOT_SUPPORTED is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PCIE_ASPM_CONTROLS is set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> CMOS_RTC_NOT_PRESENT is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT: ARM Boot Architecture flag states</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PSCI_COMPLIANT is not set</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos> PSCI_USE_HVC is not set</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 6: FADT checksum test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT checksum is correct</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 6: FADT revision test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT revision: 6.1</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT table length: 276</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>FADT revision is outdated: 6.1</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>The most recent revision of the FADT defined in the ACPI specification is 6.3. While older revisions of the FADT can be used, newer ones may enable additional functionality that cannot be used until the FADT is updated.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 6: ACPI FADT Description Table tests.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Only one of FIRMWARE_CTRL and X_FIRMWARE_CTRL is non-zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT 32 bit DSDT and 64 bit X_DSDT both point to the same physical address (0x7eee4000).</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>While it is not correct to use both of the 32- and 64-bit DSDT address fields in recent versions of ACPI, they are at least the same address, which keeps the kernel from getting confused. At some point, the 32-bit DSDT address may get ignored so it is recommended that the FADT be upgraded to only use the 64-bit X_DSDT field. In the meantime, however, ACPI will still behave correctly.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT first reserved field is zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT second reserved field is zero.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT Preferred PM Profile: 4 (Enterprise Server)</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT has a valid preferred PM profile.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT indicates ACPI IS NOT in reduced hardware mode.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT SCI_INT is 9</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT SMI_CMD indicates System Management Mode is supported, and the SCI Interrupt is non-zero.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT SMI ACPI enable command is non-zero, and SMM is supported.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT SMI ACPI disable command is non-zero, and SMM is supported.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT indicates we are not in reduced hardware mode, and required FACS is present.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT S4BIOS_REQ command is not set and FACS indicates it is not supported.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT required PM1A_EVT_BLK field is non-zero</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT 32- and 64-bit PM1A_EVT_BLK fields are at least equal.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Both FADT 32- and 64-bit PM1A_EVT_BLK fields are being used, but only one should be non-zero. However, they are at least equal so the kernel will at least have a usable value.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>FADT PM1B_EVT_BLK not being used.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT required PM1A_CNT_BLK field is non-zero</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT 32- and 64-bit PM1A_CNT_BLK fields are at least equal.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Both FADT 32- and 64-bit PM1A_CNT_BLK fields are being used, but only one should be non-zero. However, they are at least equal so the kernel will at least have a usable value.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>FADT PM1B_CNT_BLK not being used.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT 32- and 64-bit PM2_CNT_BLK fields are at least equal.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Both FADT 32- and 64-bit PM2_CNT_BLK fields are being used, but only one should be non-zero. However, they are at least equal so the kernel will at least have a usable value.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT 32- and 64-bit PM_TMR_BLK fields are at least equal.</TD> </TR> <TR> <TD class=style_advice>Advice</TD><TD COLSPAN=2 class=style_advice_info>Both FADT 32- and 64-bit PM_TMR_BLK fields are being used, but only one should be non-zero. However, they are at least equal so the kernel will at least have a usable value.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT PM1_EVT_LEN >= 4.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT PM1_CNT_LEN >= 2.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT PM2_CNT_LEN >= 1.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT PM_TMR_LEN is 4.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT GPE0_BLK_LEN non-zero and a non-negative multiple of 2: 32.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT GPE1_BLK_LEN is zero and GPE1_BLK is not supported.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT GPE1_BASE is 16</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Using P_BLK address of 0x410</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>FADT P_LVL2_LAT is > 100 (101) but a P_BLK is defined. This implies a C2 state is not supported, but there is a P_BLK register block defined which implies there might be a C2 state that works. There is not enough information to determine if this is expected or not.</TD> </TR> <TR> <TD class=style_error>Warning</TD><TD COLSPAN=2 class=style_advice_info>FADT P_LVL3_LAT is > 1000 (1001) but a P_BLK is defined. This implies a C3 state is not supported, but there is a P_BLK register block defined which implies there might be a C3 state that works. There is not enough information to determine if this is expected or not.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT FLUSH_SIZE is 0</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT FLUSH_STRIDE is 0</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT DUTY_OFFSET is 1</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT DUTY_WIDTH is 3</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT DAY_ALRM is 13</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT MON_ALRM is 0</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT CENTURY is 50</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT X_GPE0_BLK has correct byte access width.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT X_GPE1_BLK has correct byte access width.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT SLEEP_CONTROL_REG is null and not available when not in reduced hardware mode.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT SLEEP_STATUS_REG is null and not available when not in reduced hardware mode.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT Hypervisor Vendor Identity is 0</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 6: Test FADT SCI_EN bit is enabled.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>FADT is greater than ACPI version 1.0</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>SCI_EN bit in PM1a Control Register Block is enabled.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 6: Test FADT reset register.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT reset register width is 8 bits wide as expected.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>FADT register bit offset is 0 as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>30 passed, 0 failed, 3 warnings, 0 aborted, 2 skipped, 1 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>facs: FACS Firmware ACPI Control Structure test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: FACS Firmware ACPI Control Structure test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>FACS Firmware ACPI Control Structure:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Signature: 'FACS'</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Length: 0x00000040</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Hardware Signature: 0x0000a100</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Firmware Waking Vector: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Global Lock: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> X-Firmware Waking Vector: 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Version: 0x02</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> OSPM Flags: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00 0x00 0x00 0x00</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in FACS table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>erst: ERST Error Record Serialization Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: ERST Error Record Serialization Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>ERST Error Record Serialization Table :</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Serialization Hdr. Size: 0x00000030</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction Entry Count: 0x00000010</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST header looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x0 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x1 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x2 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x3 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x4 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x5 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x6 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x7 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x8 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0x9 looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xa looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xb looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xc looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xd looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xe looks sane.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>ERST Serialization Entry 0xf looks sane.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in ERST table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>einj: EINJ Error Injection Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: EINJ Error Injection Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>EINJ Error Injection Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Header Size: 0x00000030</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Flags: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Entry Count: 0x00000009</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 02</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 03</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 04</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 05</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 06</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 07</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Instruction Entry 08</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Injection Action : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Instruction : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Flags : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Reserved : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address Space ID : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Width : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Register Bit Offset : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Access Size : 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Address : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Value : 0x0000000000000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Mask : 0x0000000000000000</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in EINJ table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>ecdt: ECDT Embedded Controller Boot Resources Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI ECDT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>drtm: DRTM D-RTM Resources Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI DRTM table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dppt: DPPT DMA Protection Policy Table test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI DPPT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dmar: DMA Remapping (VT-d) test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: DMA Remapping test.</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>No DMAR table. This is not necessarily a failure as most systems do not have this table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_wpc: Wireless power calibration device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI wireless power calibration device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 14 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_time: Time and alarm device test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>ACPI time and alarm device: \_SB_.PC00.LPC0.TIME</PRE></TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 21: Test _GCP (Get Capabilities).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_GCP correctly returned sane looking value 0x00000004.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 21: Test _GRT (Get Real Time).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_GRT correctly returned a sane looking buffer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 3 of 21: Test _SRT (Set Real Time).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_SRT correctly returned sane looking value 0x00000000.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 4 of 21: Test _GWS (Get Wake Status).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_GWS correctly returned sane looking value 0x00000000.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 5 of 21: Test _CWS (Clear Wake Status).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_CWS correctly returned sane looking value 0x00000001.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_CWS correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 6 of 21: Test _STP (Set Expired Timer Wake Policy).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_STP correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 7 of 21: Test _STV (Set Timer Value).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_STV correctly returned sane looking value 0x00000001.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 8 of 21: Test _TIP (Expired Timer Wake Policy).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_TIP correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 9 of 21: Test _TIV (Timer Values).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_TIV correctly returned an integer.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 10 of 21: Test _ADR (Return Unique ID for Device).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _ADR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 11 of 21: Test _CID (Compatible ID).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CID.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 12 of 21: Test _CLS (Class Code).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _CLS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 13 of 21: Test _DDN (DOS Device Name).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _DDN.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 14 of 21: Test _HID (Hardware ID).</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>_HID returned a string 'ACPI000E' as expected.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 15 of 21: Test _HRV (Hardware Revision Number).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _HRV.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 16 of 21: Test _MLS (Multiple Language String).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _MLS.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 17 of 21: Test _PLD (Physical Device Location).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _PLD.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 18 of 21: Test _SUB (Subsystem ID).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SUB.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 19 of 21: Test _SUN (Slot User Number).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _SUN.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 20 of 21: Test _STR (String).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _STR.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 21 of 21: Test _UID (Unique ID).</TD> </TR> <TR> <TD class=style_skipped>Skipped</TD><TD>Skipping test for non-existent object _UID.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>11 passed, 0 failed, 0 warning, 0 aborted, 11 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_als: Ambient light sensor device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI ambient light sensor device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 17 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_nvdimm: NVDIMM device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI NVDIMM device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 6 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_lid: Lid device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI lid device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 15 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_slpb: Sleep button device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI sleep button device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 12 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_pwrb: Power button device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI power button device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 13 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_ec: ACPI embedded controller device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI EC device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 15 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>smart_battery: ACPI smart battery device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI smart battery device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 13 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_battery: ACPI battery device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI battery device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 25 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpi_ac: AC adapter device test</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI AC adapter device does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 16 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dbg2: DBG2 (Debug Port Table 2) test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI DBG2 table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 2 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>dbgp: DBGP (Debug Port) Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI DBGP table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>cstates: Processor C state support test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test all CPUs C-states.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>This test checks if all processors have the same number of C-states, if the C-state counter works and if C-state transitions happen.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 7 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 5 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 5 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 3 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 3 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 1 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 1 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 6 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 6 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 4 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 4 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 2 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 2 has the same number of C-states as processor 7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 0 has reached all C-states: </TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Processor 0 has the same number of C-states as processor 7</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>15 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>csrt: CSRT Core System Resource Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI CSRT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>cpep: CPEP Corrected Platform Error Polling Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI CPEP table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>checksum: ACPI table checksum test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: ACPI table checksum test.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table RSDP has correct checksum 0x02.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table RSDP has correct extended checksum 0x77.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table XSDT has correct checksum 0x14</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table DSDT has correct checksum 0xc9</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table FACP has correct checksum 0x38</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has correct checksum 0x9b</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table TPM2 has correct checksum 0x70</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has correct checksum 0x18</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HEST has correct checksum 0x0e</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BERT has correct checksum 0xbc</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table ERST has correct checksum 0x30</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table EINJ has correct checksum 0x63</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BGRT has correct checksum 0x3d</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HPET has correct checksum 0x65</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table WDDT has correct checksum 0x27</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table APIC has correct checksum 0x1e</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table MCFG has correct checksum 0x02</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SLIT has correct checksum 0xc6</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SRAT has correct checksum 0xf5</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HMAT has correct checksum 0xe2</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SPMI has correct checksum 0xff</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SPCR has correct checksum 0xa0</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table MSCT has correct checksum 0xe9</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BDAT has correct checksum 0xef</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table WSMT has correct checksum 0xc0</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table PCCT has correct checksum 0xde</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has correct checksum 0x06</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has correct checksum 0x85</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has correct checksum 0x6c</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table OEM1 has correct checksum 0xdf</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table FPDT has correct checksum 0xd7</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table RSDT has correct checksum 0x86</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>32 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>autobrightness: Automated LCD brightness test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: Test for maximum and actual brightness.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: Change actual brightness.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>boot: BOOT Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI BOOT table is depreciated on UEFI firmware, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>bgrt: BGRT Boot Graphics Resource Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: BGRT Boot Graphics Resource Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>BGRT Boot Graphics Resource Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Version: 0x0001</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Status: 0x01</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Image Type: 0x00</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Image Memory Address: 0x00000000273a8018</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Image Offset X: 0x0000016a</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Image Offset Y: 0x000000b7</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in BGRT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>bert: BERT Boot Error Record Table test.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: BERT Boot Error Record Table test.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Boot Error Record Table:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Region Length 0x00008000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Region 0x000000007eb3f018</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>Boot Error Region:</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Block Status: bit [0] 0x0 (Uncorrectable Error Valid)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Block Status: bit [1] 0x0 (Correctable Error Valid)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Block Status: bit [2] 0x0 (Multiple Uncorrectable Errors)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Block Status: bit [3] 0x0 (Multiple Correctable Errors)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Block Status: bit [13:4] 0x0 (Error Data Entry Count)</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Raw Data Offset: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Raw Data Length: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Data Length: 0x00000000</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code> Error Severity 0x00000000</PRE></TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>No issues found in BERT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>aspt: ASPT Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI ASPT table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>asf: ASF! Alert Standard Format Table test.</TD> </TR> <TR> <TD class=style_error>Error</TD><TD COLSPAN=2>ACPI ASF! table does not exist, skipping test</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>0 passed, 0 failed, 0 warning, 0 aborted, 1 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>apicinstance: Test for single instance of APIC/MADT table.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 1: Test for single instance of APIC/MADT table.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Found APIC/MADT table APIC @ 7eef1000, length 0xbc</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Found 1 APIC/MADT table(s), as expected.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>1 passed, 0 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR> <TD COLSPAN=2 class=style_heading>acpitables: ACPI table headers sanity tests.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 1 of 2: Test ACPI headers.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table XSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table DSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table FACP has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table TPM2 has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HEST has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BERT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table ERST has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table EINJ has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BGRT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HPET has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table WDDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table APIC has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table MCFG has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SLIT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SRAT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table HMAT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SPMI has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SPCR has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table MSCT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table BDAT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table WSMT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table PCCT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table SSDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table OEM1 has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table FPDT has valid signature and ID strings.</TD> </TR> <TR> <TD class=style_passed>PASSED</TD><TD>Table RSDT has valid signature and ID strings.</TD> </TR> <TR><TD class=style_subtest COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Test 2 of 2: Test ACPI spec versus table revisions.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos><PRE class=style_code>System supports ACPI 0610</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table XSDT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table DSDT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT has a matched revision.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>ACPI Table SSDT revision was expected to be 2, got 1.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table HEST has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table BERT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table ERST has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table EINJ has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table BGRT has a matched revision.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>ACPI Table APIC revision was expected to be 4, got 3.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SLIT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SRAT has a matched revision.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>ACPI Table MSCT revision was expected to be 1, got 2.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>ACPI Table PCCT revision was expected to be 1, got 2.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table SSDT has a matched revision.</TD> </TR> <TR> <TD class=style_medium>FAILED [MEDIUM]</TD> <TD>ACPI Table SSDT revision was expected to be 2, got 1.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table FPDT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_infos>Table RSDT has a matched revision.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>30 passed, 5 failed, 0 warning, 0 aborted, 0 skipped, 0 info only.</TD> </TR> <TR><TD class=style_heading COLSPAN=2>Summary</TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>931 passed, 16 failed, 9 warnings, 1 aborted, 420 skipped, 12 info only.</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>Test Failure Summary</TD> </TR> <TR><TD class=style_heading COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>Critical failures: 1</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> mtrr: Memory range 0xa2000000 to 0xa3ffffff (0000:01:00.0) has incorrect attribute Write-Protect.</PRE></TD> </TR> <TR><TD class=style_heading COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>High failures: 2</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> klog: HIGH Kernel message: [ 0.380305] tpm tpm0: [Firmware Bug]: TPM interrupt not working, polling instead</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> dmicheck: Type 17 expects length of 0x54, has incorrect length of 0x5c</PRE></TD> </TR> <TR><TD class=style_heading COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>Medium failures: 5</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> madt: MADT revision is not in sync with the FADT revision; MADT 3 expects FADT 6.0 but found 6.1 instead.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> acpitables: ACPI Table SSDT revision was expected to be 2, got 1.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> acpitables: ACPI Table APIC revision was expected to be 4, got 3.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> acpitables: ACPI Table MSCT revision was expected to be 1, got 2.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> acpitables: ACPI Table PCCT revision was expected to be 1, got 2.</PRE></TD> </TR> <TR><TD class=style_heading COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>Low failures: 4</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> maxreadreq: 2 devices have low MaxReadReq settings. Firmware may have configured these too low.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> dmicheck: String index 0x04 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Serial Number', offset 0x20 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> dmicheck: String index 0x05 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Asset Tag', offset 0x21 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code> dmicheck: String index 0x06 in table entry 'Processor Information (Type 4)' @ 0x29607945, field 'Part Number', offset 0x22 has a default value 'To Be Filled By O.E.M.' and probably has not been updated by the BIOS vendor.</PRE></TD> </TR> <TR><TD class=style_heading COLSPAN=2></TD></TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary>Other failures: NONE</TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>Test |Pass |Fail |Abort|Warn |Skip |Info |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>---------------+-----+-----+-----+-----+-----+-----+</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_ac | | | | | 16| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_als | | | | | 17| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_battery | | | | | 25| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_ec | | | | | 15| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_lid | | | | | 15| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_nvdimm | | | | | 6| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_pwrb | | | | | 13| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_slpb | | | | | 12| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_time | 11| | | | 11| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpi_wpc | | | | | 14| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpiinfo | | | | | | 3|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>acpitables | 30| 5| | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>apicedge | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>apicinstance | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>asf | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>aspm | 2| | | 1| | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>aspt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>autobrightness | | | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>bert | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>bgrt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>bios32 | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>bios_info | | | | | | 1|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>bmc_info | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>boot | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>checksum | 32| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>clog | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>cpep | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>cpu_info | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>cpufreq | | | | | 7| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>crs | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>csm | | | | | | 1|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>csrt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>cstates | 15| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dbg2 | | | | | 2| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dbgp | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dmar | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dmicheck | 116| 7| | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dppt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>drtm | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dt_base | | | | | 3| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>dt_sysinfo | | | | | 4| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>ebda | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>ecdt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>einj | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>erst | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>esrt | | | 1| | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>facs | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>fadt | 30| | | 3| 2| 1|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>fan | 8| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>fpdt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>gtdt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>hda_audio | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>hest | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>hmat | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>hpet | 5| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>iort | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>klog | | 1| | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>lpit | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>madt | 81| 1| | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>maxfreq | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>maxreadreq | | 1| | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mcfg | 2| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mchi | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mem_info | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>method | 373| | | | 168| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>microcode | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mpcheck | | | | | 9| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mpst | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>msct | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>msdm | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>msr | 89| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mtd_info | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>mtrr | 3| 1| | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>nfit | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>nx | 3| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>olog | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>oops | 2| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>osilinux | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pcc | | | | | | 1|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pcct | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pciirq | | | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pdtt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pmtt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pnp | | | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>power_mgmt | | | | | 2| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>pptt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>prd_info | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>rasf | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>reserv_mem | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>rsdp | 8| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>rsdt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>sbst | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>sdei | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>sdev | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>securebootcert | 1| | | 4| 1| 1|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>slic | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>slit | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>smart_battery | | | | | 13| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>spcr | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>spmi | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>srat | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>stao | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>tcpa | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>tpm2 | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefi | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefibootpath | 21| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefirtauthvar | | | | | 11| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefirtmisc | 7| | | | 7| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefirttime | 35| | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>uefirtvariable | 25| | | 1| 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>version | | | | | | 4|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>virt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>waet | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>wakealarm | 6| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>wdat | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>wmi | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>wpbt | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>wsmt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>xenv | | | | | 1| |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>xsdt | 1| | | | | |</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>---------------+-----+-----+-----+-----+-----+-----+</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>Total: | 931| 16| 1| 9| 420| 12|</PRE></TD> </TR> <TR> <TD></TD><TD COLSPAN=2 class=style_summary><PRE class=style_code>---------------+-----+-----+-----+-----+-----+-----+</PRE></TD> </TR> </TABLE> </BODY> </HTML>